i.MX8MM SPI ILI9341 display problem

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i.MX8MM SPI ILI9341 display problem

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NamnNamnsson
Contributor II

Dear Sirs,

We are running i.MX8MM with Linux kernel 6.1 with weston. The display TST350MTQI has ILI9341 driver and we are using the mi0283qt kernel driver from drivers/gpu/drm/tiny. Electrical onnection is 3-wire SPI to ECSPI1 on i.MX8.

The display looks to be set up ok when running modetest:

root@imx8mmea-ucom:~# modetest -M mi0283qt
Encoders:
id crtc type possible crtcs possible clones
35 34 none 0x00000001 0x00000001

Connectors:
id encoder status name size (mm) modes encoders
31 35 connected SPI-1 72x54 1 35
modes:
index name refresh (Hz) hdisp hss hse htot vdisp vss vse vtot
#0 320x240 0.01 320 320 320 320 240 240 240 240 1 flags: ; type: preferred, driver
props:
1 EDID:
flags: immutable blob
blobs:

value:
2 DPMS:
flags: enum
enums: On=0 Standby=1 Suspend=2 Off=3
value: 0
5 link-status:
flags: enum
enums: Good=0 Bad=1
value: 0
6 non-desktop:
flags: immutable range
values: 0 1
value: 0
4 TILE:
flags: immutable blob
blobs:

value:

CRTCs:
id fb pos size
34 36 (0,0) (320x240)
#0 320x240 0.01 320 320 320 320 240 240 240 240 1 flags: ; type: preferred, driver
props:
24 VRR_ENABLED:
flags: range
values: 0 1
value: 0

Planes:
id crtc fb CRTC x,y x,y gamma size possible crtcs
32 34 36 0,0 0,0 0 0x00000001
formats: RG16 XR24
props:
8 type:
flags: immutable enum
enums: Overlay=0 Primary=1 Cursor=2
value: 1
30 IN_FORMATS:
flags: immutable blob
blobs:

value:
01000000000000000200000018000000
01000000200000005247313658523234
03000000000000000000000000000000
0000000000000000
in_formats blob decoded:
RG16: LINEAR
XR24: LINEAR

Frame buffers:
id size pitch

Device tree entry is:

&ecspi1 {
	#address-cells = <1>;
	#size-cells = <0>;
	fsl,spi-num-chipselects = <1>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>;
	cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
	status = "okay";

	TST350MTQI: TST350MTQI@0 {

		compatible = "multi-inno,mi0283qt";
		reg = <0>;
		spi-max-frequency = <32000000>;
		status = "okay";
		rotation = <180>;

	};
};

Also, when looking for drm error messages in dmesg, it look ok:

root@imx8mmea-ucom:~# dmesg | grep drm
[ 1.210213] imx-drm 32c00000.bus:display-subsystem: no available port
[ 1.830831] [drm] Initialized mi0283qt 1.0.0 20160614 for spi0.0 on minor 0
[ 9.693375] mi0283qt spi0.0: [drm] fb0: mi0283qtdrmfb frame buffer device
[ 9.787565] [drm] Initialized vivante 1.0.0 20170808 for 38000000.gpu on minor 1
[ 11.367343] systemd[1]: Starting Load Kernel Module drm...

However, the issue is that the picture shown is misaligned repeatedly when running modetest:

root@imx8mmea-ucom:~# modetest -M mi0283qt -s 31@34:320x240@RG16

 

modetest display resultmodetest display result

With the SPI- & drm-debug enabled it shows this when running modetest as above:

[ 515.462802] [drm:drm_ioctl] comm="modetest" pid=463, dev=0xe200, auth=1, DRM_IOCTL_MODE_DIRTYFB
[ 515.462830] [drm:drm_mode_object_get] OBJ ID: 37 (3)
[ 515.462843] [drm:drm_mode_object_get] OBJ ID: 40 (1)
[ 515.462888] [drm:mipi_dbi_fb_dirty] Flushing [FB:37] 320x240+0+0
[ 515.464125] [drm:mipi_dbi_typec1_command] cmd=2a, par=00 00 01 3f
[ 515.464166] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 10000000, post: 0, pre: 4
[ 515.464190] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 10000000, post: 0, pre: 4
[ 515.464209] [drm:mipi_dbi_typec1_command] cmd=2b, par=00 00 00 ef
[ 515.464225] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 10000000, post: 0, pre: 4
[ 515.464243] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 10000000, post: 0, pre: 4
[ 515.464262] [drm:mipi_dbi_typec1_command] cmd=2c, len=153600
[ 515.464278] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 10000000, post: 0, pre: 4
[ 515.464422] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 515.472009] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 515.479986] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 515.487228] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 515.494799] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 515.502419] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 515.509996] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 515.517862] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 515.525768] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 515.533764] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 515.541703] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 515.549667] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 515.557632] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 515.565532] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 515.573502] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 515.581434] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 515.589395] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 515.597363] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 515.605238] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 515.610917] [drm:drm_mode_object_put.part.0] OBJ ID: 40 (2)
[ 515.610947] [drm:drm_mode_object_put.part.0] OBJ ID: 37 (4)
[ 515.610965] [drm:drm_mode_object_put.part.0] OBJ ID: 37 (3)
[ 515.610991] [drm:drm_mode_object_put.part.0] OBJ ID: 41 (1)
[ 515.610996] [drm:drm_ioctl] comm="modetest" pid=463, dev=0xe200, auth=1, DRM_IOCTL_MODE_SETGAMMA
[ 515.611017] [drm:drm_ioctl] comm="modetest", pid=463, ret=-38

This shows that the data over SPI is sent in chunks due to what I believe might be some memory constraint (?).

Similar debug output when starting weston:

root@imx8mmea-ucom:~# systemctl restart weston

[ 247.229243] [drm:mipi_dbi_typec1_command] cmd=2a, par=00 00 01 3f
[ 247.229293] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 10000000, post: 0, pre: 4
[ 247.229319] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 10000000, post: 0, pre: 4
[ 247.229339] [drm:mipi_dbi_typec1_command] cmd=2b, par=00 00 00 ef
[ 247.229354] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 10000000, post: 0, pre: 4
[ 247.229371] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 10000000, post: 0, pre: 4
[ 247.229389] [drm:mipi_dbi_typec1_command] cmd=2c, len=153600
[ 247.229404] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 10000000, post: 0, pre: 4
[ 247.229547] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 247.236897] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 247.244356] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 247.252239] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 247.259869] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 247.267475] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 247.275392] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 247.283387] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 247.291381] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 247.298929] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 247.306849] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 247.314826] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 247.322790] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 247.330753] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 247.338713] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 247.346621] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 247.354590] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 247.362583] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1
[ 247.370523] spi_imx 30820000.spi: mx51_ecspi_clkdiv: fin: 50000000, fspi: 32000000, post: 0, pre: 1

And display result shows same issue on weston desktop:

weston display outputweston display output

Also, both pictures show only ~half screen is filled with data.

 

Please help us finding the root cause to this issue, the driver and LCD is widely used elsewhere as far as we can see.

Best Regards,

Namn

 

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NamnNamnsson
Contributor II

Hi, Thank you for your input. We have digged a bit deeper and the symptom can be mitigated if we force mipi_dbi_spi1e_transfer in drm_mipi_dbi.c (https://elixir.bootlin.com/linux/latest/source/drivers/gpu/drm/drm_mipi_dbi.c#L982 ). This is depending on the spi_is_bpw_supported() and bits_per_word is set in spi-imx.c.

There is no specific imx8-related code in spi-imx.c, last I see is imx6ul. What bits_per_word setting would we use?

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Bio_TICFSL
NXP TechSupport
NXP TechSupport

Hello,

 

It appears to be the driver the dtb is ok, but you may check the driver:

https://github.com/juj/fbcp-ili9341

 

Regards

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NamnNamnsson
Contributor II

Hi, Thank you for your input. We have digged a bit deeper and the symptom can be mitigated if we force mipi_dbi_spi1e_transfer in drm_mipi_dbi.c (https://elixir.bootlin.com/linux/latest/source/drivers/gpu/drm/drm_mipi_dbi.c#L982 ). This is depending on the spi_is_bpw_supported() and bits_per_word is set in spi-imx.c.

There is no specific imx8-related code in spi-imx.c, last I see is imx6ul. What bits_per_word setting would we use?

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