i.MX8M Plus UART3 CTS_B drive strength

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

i.MX8M Plus UART3 CTS_B drive strength

1,710件の閲覧回数
MS-MS
Contributor I

We're using i.MX8M Plus UART3 for RS-485.

but UART3_CTS_B pin could be driven only 10K MAX. So, it could not be controlled the RS-485 driver device(ADM2587).

Is it the correct behavior?

 

and, If drive strength set to x6(12mA), it seems to be changed to x2 when MUX set to UART mode automatically.

0 件の賞賛
返信
14 返答(返信)

1,682件の閲覧回数
Dhruvit
NXP TechSupport
NXP TechSupport

Hi @MS-MS,

I have included below my comments,

  • Yes, the UART3_CTS_B pin can not be controlled by the RS-485 driver. Rather it is only configured by the Device tree.
  • There is a possibility that the Drive Strength Field(DSE) value could be overwritten by the device tree. Please check the same.
 
 
Thanks & Regards,
Dhruvit.
0 件の賞賛
返信

1,661件の閲覧回数
MS-MS
Contributor I

Thanks,

With your suggestions, It was able to set the drive strength to 12mA.

However, the voltage of CTS_B is up to Hi=2.2V.

0 件の賞賛
返信

1,612件の閲覧回数
MS-MS
Contributor I

I need your additional suggestions.

 

CTS_B Hi-level is not rise to 3.3V.  

Is there any register setting necessary?

 

0 件の賞賛
返信

1,605件の閲覧回数
Dhruvit
NXP TechSupport
NXP TechSupport

Hi @MS-MS 

With reference to the 3.3V Logic level, Vih of 3.3V shall be a minimum of 2V. Since 2.2V is received on the CTS pin, the RS485 driver device shall detect it as high. Could you please confirm if you are facing issues in the communication between the processor and the RS485 device?

Thanks & Regards

Dhruvit Vasavada

0 件の賞賛
返信

1,603件の閲覧回数
MS-MS
Contributor I

Thanks,

I'm not sure, why high level of TX/RX are 3.3V but only CTS_B is 2.2V.

Is there different buffer between TX/RX and CTS_B?

 

0 件の賞賛
返信

1,587件の閲覧回数
Dhruvit
NXP TechSupport
NXP TechSupport

Hi @MS-MS,

 

I understand your concern. Could you please share the end-to-end schematic connections of the pins used for the RS-485 interface?

0 件の賞賛
返信

1,581件の閲覧回数
MS-MS
Contributor I

Attached please find the schematics.

Thanks.

0 件の賞賛
返信

1,568件の閲覧回数
Dhruvit
NXP TechSupport
NXP TechSupport

Hi @MS-MS 

I hope you are doing well

The attached image seems to be a block diagram rather than a schematic. Could you please share the schematic which has the electrical connections with passive components as well?
 
Thanks & Regards
Dhruvit Vasavada

0 件の賞賛
返信

1,559件の閲覧回数
MS-MS
Contributor I

ok. attached.

0 件の賞賛
返信

1,532件の閲覧回数
Dhruvit
NXP TechSupport
NXP TechSupport

Hi @MS-MS,

I hope you are doing well.

Please remove the R51 resistor to isolate that particular pin and then drive the pin high from the processor. Check if 3.3V is received on that particular pin.

Thanks & Regards,
Dhruvit.
0 件の賞賛
返信

1,529件の閲覧回数
MS-MS
Contributor I

In such case, CTS_B Hi=2.7V.

0 件の賞賛
返信

1,472件の閲覧回数
Dhruvit
NXP TechSupport
NXP TechSupport

Hi @MS-MS,

I hope you are doing well.
 
Kindly set the configuration as given below(default in BSP version 5.15.71) in the device tree and check if the issue is resolved or not. 
If not please check from where the voltage is leaking. Is this pin connected somewhere else also?
As we are getting the 3.3 V on the same pin in EVK.
 
pad 0x30330318=0x10
 
Thanks & Regards,
Dhruvit Vasavada.

0 件の賞賛
返信

1,414件の閲覧回数
MS-MS
Contributor I

If 0x30330318 set to 0x10, there is no change (Still 2.4V)

CTS_B is also connected to GPIO4_IO[9] as default setting(Input).

0 件の賞賛
返信

1,392件の閲覧回数
Dhruvit
NXP TechSupport
NXP TechSupport

Hi @MS-MS,

I hope you are doing well

Kindly try after connecting the R51 and removing the R57 resistor. And please measure the voltage at TP23.

 

Thanks & Regards,
Dhruvit Vasavada

0 件の賞賛
返信