Hi NXP,
I have a WiFi module attached to the M.2 slot on the NXP i.MX8M EVK board. I try to verify the WoWLAN function - i.e. the wireless module can wake the host board in suspend/sleep mode.
NXP i.MX8M schematic shows the following connection.
ECSPI2_MOSI (i.MX8M SoC pin E5) <----------- PCIe_nWake---------->M.2 (Pin55 PEWAKE0) / WiFi Module
I looked at the kernel DTS files for i.MX8M EVK, I did not see ECSPI2_MOSI pin defined in the DTS file. I assume this pin needs to be defined to be a GPIO input pin and as a wake-source, so that the wireless module can assert the wake signal and wake the host board (EVK board) from suspend/sleep mode through the GPIO/ECSPI2_MOSI pin.
Could NXP please help me with defining this pin in the kernel DTS file?
Thank you very much!
Would it make sense for me to add the following to the DTS?
wowlan {
label = "Wake on WLAN";
gpios = <&gpio5 11 GPIO_ACTIVE_HIGH>
wakeup-source;
}
The wifi linux driver of IWXXX will use below dts node to configure GPIO5_IO11 as interrupt.There is no need to set the pinctl, please refer the dts we release.
wifi_wake_host {
compatible = "nxp,wifi-wake-host";
interrupt-parent = <&gpio5>;
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "host-wake";
};
WIFI linux driver:
#ifdef IMX_SUPPORT
/**
* @brief This function allocates the interrupt line to wakeup
* the host, and initializes the device for wakeup
*
* handle A pointer to moal_handle structure
*
* @return N/A
*/
void woal_regist_oob_wakeup_irq(moal_handle *handle)
{
int ret;
struct device *dev = handle->hotplug_device;
struct device_node *node; ENTER(); node = of_find_compatible_node(NULL, NULL, "nxp,wifi-wake-host");
if (!node)
goto err_exit; handle->irq_oob_wakeup = irq_of_parse_and_map(node, 0);
if (!handle->irq_oob_wakeup) {
dev_dbg(dev, "fail to parse irq_oob_wakeup from device tree\n");
goto err_exit;
} ret = devm_request_irq(dev, handle->irq_oob_wakeup,
woal_oob_wakeup_irq_handler,
IRQF_TRIGGER_LOW | IRQF_SHARED,
"wifi_oob_wakeup", handle);
if (ret) {
dev_err(dev, "Failed to request irq_oob_wakeup %d (%d)\n",
handle->irq_oob_wakeup, ret);
goto err_exit;
} disable_irq(handle->irq_oob_wakeup);
if (device_init_wakeup(dev, true)) {
dev_err(dev, "fail to init irq_oob_wakeup\n");
goto err_exit;
} LEAVE();
return; err_exit:
handle->irq_oob_wakeup = -1;
}
Thank you! I ran a test and my M.2 WiFi module failed to wake up the host. I have not used a scope to monitor the PCIe_nWake waveform yet.
The signal characteristic from the module side is open/drain. An external 10K pull-up is expected. I.M8M EVK schematic shows the PCIe_nWake signal line is wired/connects directly to the ECSPI2_MOSI (GPIO5_IO11) pin. There is no external pull-up of any kind on this signal line. The DTS, however, enabled internal pull-up (PUE = 1) for the GPIO5_11 pin.
I was wondering if the current design supports the PCIe_nWake signal from the M.2 module without an external 10K pull-up voltage. Could this be a PAD configuration issue?
Thank you,
DTS:
pinctrl_pcie1: pcie1grp {
fsl,pins = <
...
MX8MQ_IOMUXC_ECSPI2_MOSI_GPIO5_IO11 0x41
>;
};
Hi @daweichen
Please share your wifi module.
It's a QCA2066 802.11ax module.
The signal from the module is open-drain. An external pull-up is expected.
Since there is no external pull-up, I am not sure if the internal pull-up on the ECSPI2_MOSI line is adequate.
You should check the QCA2066 driver about this interrupt registration.On the NXP WIFI platform, this function can work.
The dts has defined this interrupt:
wifi_wake_host {
compatible = "nxp,wifi-wake-host";
interrupt-parent = <&gpio5>;
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "host-wake";
};
The i.MX8M Reference Manual says ECSPI2_MOSI => GPIO5 IO11.
I would like GPIO5 IO11 to be an input pin and a wake-source.
Would you be kind enough to help understand correlation between GPIO5 IO11 and the wifi_wake_host declaration block.
&gpio5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wifi_reset>;
wl-reg-on-hog {
gpio-hog;
gpios = <29 GPIO_ACTIVE_HIGH>;
output-high;
};
};
pinctrl_wifi_reset: wifiresetgrp {
fsl,pins = <
MX8MQ_IOMUXC_UART4_TXD_GPIO5_IO29 0x16
>;
};