i.MX6ULL - LCD Reset / GPIO5_IO09 / Tamper

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i.MX6ULL - LCD Reset / GPIO5_IO09 / Tamper

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brianptl
Contributor III

Hi All,

I am investigating an issue with our custom board and I cannot seem to control the pad MX6_PAD_SNVS_TAMPER9__GPIO5_IO09 inside u-boot. I am using an LCD. It is a different LCD than on the 14x14 imx6ull dev kit, however the LCD pin configuration is the same on the dev kit.

I cannot seem to toggle the pin, either as a GPIO or through the LCD interface. It always appears high.

Ref 1: i.MX 6ULL Applications Processor Reference Manual, Rev. 1, 11/2017

I have done the following in u-boot:

Read SW_PAD_CTL_PAD_SNVS_TAMPER9 SW PAD Control Register, page 1541 (Ref 1)

Reg Address: 229_0070h

=> md 2290070  
02290070: 000110a0 00000000 00000000 00000000    ................

Looks like the default values.

Read SW_MUX_CTL_PAD_SNVS_TAMPER9 SW MUX Control Register, page 1508 (Ref 1)

Reg Address: 229_002Ch

=> md 229002C
0229002c: 00000000 000030a0 0001b0a0 0001b0a0    .....0..........

Writing has no effect:

=> mw.l 229002C 5
=> md 229002C    
0229002c: 00000000 000030a0 0001b0a0 0001b0a0    .....0..........

It does state that the value here depends on TAMPER_PIN_DISABLE[1:0]

So read the fuses:

=> fuse read 0 3
Reading bank 0:

Word 0x00000003: 71310098

Bits 21:20 are 11, so the tamper pins are used as GPIO according to the Fusemap Descriptions Table on page 228 (Ref 1)

Read GPIO direction register (GPIO5_GDIR) , page 1357 (Ref 1)

Reg Address: 20A_C004

=> md 20AC004
020ac004: 00000200 00000820 00000000 00000000    .... ...........

Bit 9 is set, so we have an output

Read GPIO data register (GPIO5_DR), page 1357 (Ref 1)

Reg Address: 20A_C000

=> md 20AC000
020ac000: 00000a20 00000200 00000820 00000000     ....... .......

Attempt to write, pin stays high:

=> mw.l 20AC000 820
=> md 20AC000      
020ac000: 00000820 00000200 00000820 00000000     ....... .......

Maybe the LCD module has control? Try a write of eLCDIF General Control1 Register (LCDIF_CTRL1), page 2171 (Ref 1)

Reg Address: 21C_8010h

Read first:

=> md 21C8010
021c8010: 00070300 00070300 00070300 00070300    ................

Try to toggle:

=> mw.l 21C8010 00070301
=> md 21C8010           
021c8010: 00070301 00070301 00070301 00070301    ................

But the pin is still high.

Any thoughts? I must be missing something obvious.

Thanks.

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igorpadykov
NXP Employee
NXP Employee

Hi Brian

this may be hardware issue, one can try to toggle it with jtag,

may be useful to check baremetal sdk test (zip can be found on https://community.nxp.com/thread/432859 )

Best regards
igor
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brianptl
Contributor III

Hi Igor,

Thanks for the response.

It turns out the u-boot file u-boot-imx/board/freescale/mx6ullevk/mx6ullevk.c has a different pin for LCD reset than the one that is suggested in the schematic. I assumed the code was correct, which it does not appear to be.

The lines:

    /* LCD_RST */
    MX6_PAD_SNVS_TAMPER9__GPIO5_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL),

and

    /* Reset the LCD */
    gpio_request(IMX_GPIO_NR(5, 9), "lcd reset");
    gpio_direction_output(IMX_GPIO_NR(5, 9) , 0);
    udelay(500);
    gpio_direction_output(IMX_GPIO_NR(5, 9) , 1);

misled me down the wrong path.

The GPIO that I actually needed was MX6_PAD_LCD_RESET__GPIO3_IO04

    /* LCD_RST */
    MX6_PAD_LCD_RESET__GPIO3_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL),

    /* Reset the LCD */
    gpio_request(IMX_GPIO_NR(3, 4), "lcd reset");
    gpio_direction_output(IMX_GPIO_NR(3, 4) , 0);
    udelay(20);
    gpio_direction_output(IMX_GPIO_NR(3, 4) , 1);

Thanks,

Brian.

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shamiullah
Contributor III

Hi Brian,

I am also using the same pin for lcd reset in my custom board. I changed in uboot, i am getting nxp logo in uboot stage but i am not able to see anything when kernel booting starts. Can you please let me know the issues you faced while configuring in kernel and device tree. I am getting black screen when kernel booting starts. Please let me know

With regards

Shamiullah

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