i.MX6ULL Hardware related Low power mode.

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

i.MX6ULL Hardware related Low power mode.

648件の閲覧回数
theevanvenugopa
Contributor II

May I know the low power mode settings to be made in hardware design? And kindly detail about the use of SNVS_TAMPER pull down 1M resistors? 

pastedImage_1.png

Instead of providing pull down to all the SNVS_TAMPER pins, I have given in the above format. Is that okay?

タグ(2)
0 件の賞賛
返信
1 返信

482件の閲覧回数
igorpadykov
NXP Employee
NXP Employee

Hi Theevan

SNVS_TAMPER pins are associated with VDD_SNVS_IN,
in system power-down mode VDD_SNVS_IN is powered from battery.

Example of connections can be found in i.MX6ULL EVK schematic.

Schematics (1)
Design files, including hardware schematics, Gerbers, and OrCAD files.
MCIMX6ULL-EVK_DESIGNFILES
http://www.nxp.com/products/software-and-tools/software-development-tools/i.mx-software-and-tools/ev...

>Instead of providing pull down to all the SNVS_TAMPER pins, I have given in the above format. Is that okay?

seems yes

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------