i.MX6 specific registers

[aditkous]

Hello,

I was going through the reference manual to get the base addresses and size of the following. Been unsuccessful so far. Could someone fill me in?

MMIO_BASE, MMIO_SIZE, IIM_BASE, IIM_SIZE, TZIC_BASE, TZIC_SIZE, CACHE_LINE_SIZE_LOG2.

Plus, there is a MPR121.h (which is a capacitive touch processor) for i.MX53. Is there an i.MX6 equivalent?

Thanks and regards,

Aditya

PS. If one is able to get these values, can it be appended by the source?

[AnsonHuang · Accepted solution]

Hi, Aditya

     What is MMIO module?

     IIM_BASE now called OCOTP, its address is 0x21bc000, for iMX6, there is no TZIC, now use common interrupt controller called GIC, this is ARM standard interrupt controller. What is CACHE_LINE_SIZE_LOG2? The cache line size is 32 bytes.