i.MX6 Solo DISABLE_SDMMC_MFG Fuse

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i.MX6 Solo DISABLE_SDMMC_MFG Fuse

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her
Contributor I

Hello,

does someone know which eFuse corresponds to the DISABLE_SDMMC_MFG bit?

The bit is mentioned in chapter 8.11 of the reference manual, but no reference in the eFuses.

We want to set this bit because the rom loader scans SD1 and SD2 (activity on SD_CMD if SD-Card Detect is low) even if the efuses are set to to boot from NAND Flash, as long as there is no valid code in the NAND Flash.

Nice feature, but no good idea if you want to use SD Pins as generic GPIO.


Regards Herbert



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Yuri
NXP Employee
NXP Employee

Please look at Table 5-2 (EIM Boot Fusemap) if the Reference Manual, addr = 0x470[7:0] ( Disable SDMMC Manufacture mode )

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her
Contributor I

Finally a info from freescale FAE:

The reference manual is incorrect. The i.MX6SDL does support a fuse to enable/disable SDMMC Manufacture mode.

The fuse is located at address 0x450[16]. 0 = Enable / 1 = Disable

The reference manual will be updated to show this fuse in the fuse map.


I you don't want to use this fuse, check if GPIO_1 and GPIO_3 are high during rom boot.



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Yuri
NXP Employee
NXP Employee

Below are some additional details about the SDMMC manufacture mode.

1.

Really GPIO_1 and GPIO_4 (instead of GPIO_3) should be mentioned, taking into account their SD1_CD (card detect) and SD2_CD functionality.

2.

The OCOTP fuse is OCOTP_CFG4[16].

3.

For GPIO boot override, please use EIM_A16 (BOOT_CFG3[0]).

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her
Contributor I

The issue is still open: the mentioned efuse is 0x470 Bit 0-7 is NAND_READ_CMD_CODE1 (First command word to be used for Nand read), i dont think that is a solution to our problem

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Yuri
NXP Employee
NXP Employee

Please look at Table 5-2 (EIM Boot Fusemap) if the Reference Manual, addr = 0x470[7:0] ( Disable SDMMC Manufacture mode )

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her
Contributor I

Thank you,

we will try that eFuse setting next week.

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