i.MX6 SNVS_LPCR register and power down

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i.MX6 SNVS_LPCR register and power down

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torus1000
Contributor V

Hi

I just confirm power down of i.MX6.

I assume system power will be off if TOP bit in SNVS_LPCR set. (default=1)

(Q) Is it OK to leave all regulators in the PMIC on when I issue shutdown command?

I found following description in the old patch* which refer to TOP and DP_EN bit.

On sabresd board, PMIC_ON_REQ control pmic power on/off, we can set TOP and DP_EN of SNVS_LPCR to implement power off by software. On this way,SNVS RTC alarm can work after power off.

*patch:

Q&A: How is mx6 PMIC_ON_REQ under SW control?

https://community.freescale.com/docs/DOC-97660

https://community.freescale.com/servlet/JiveServlet/download/97660-1-266974/1256-ENGR00178629-i.MX6-...

I couldn't understand the relationship between TOP=DP_EN=1 and following descriptions in the manual.

・TOP

 Turn off System Power

 Asserting this bit causes a signal to be sent to the Power Management  IC to turn off the system power.

 This bit will clear once power is off. This bit is only valid when the Dumb PMIC is enabled.

      0 Leave system power on.

      1 Turn off system power.

・DP_EN

 Dumb PMIC Enabled

 When set, software can control the system power. When cleared, the system requires a Smart PMIC to

 automatically turn power off.

      0 Smart PMIC enabled.

      1 Dumb PMIC enabled.

(Q) What is the difference between TOP=1 and 0?

(Q)  What is the difference between DO_EN=1 and 0?

(Q) why set both TOP and DP_EN when powered off by software?

Can anybody help me?

Thanks.

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gusarambula
NXP TechSupport
NXP TechSupport

Hello torus1000,

You can leave the regulators in the PMIC ON when issuing a shutdown command since there is not a specific power-down sequence requirement.

The TOP bit causes a signal to be sent to the Power Management IC to turn off the system power. While TOP=0 the system power will remain on, which would be the state while operating the processor.

The Dumb PMIC option basically enables the TOP signal. If Dumb PMIC were to be disabled TOP would have no effect.

DP_EN bit = 0, setting the TOP bit has no affect

DP_EN bit = 1, setting the TOP bit will cause PMIC_ON_REQ to go low.

You would only need to enable both TOP and DP_EN when using TOP in order to power off my software.

I hope this information helps!

Regards,

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