Hi,
One of i.MX53 sometimes accidentally fell into security mode(SM=01) after boot up in spite of other i.MX53 always keep on SM=00, I don't know why.
Why did SM bit change to 01 and SRTC LP alarm? Which condition assumed to cause this issue?
Is there any workaround?
Here is SRTC register difference:
reg normal issue happened
------- ---------- -----------
LPSCMR 0x6 0x0 //LPSC mid
LPSCLR 0xc80000 0x0 //LPSC low
LPSAR 0x0 0x0
LPSMCR 0x0 0x0
LPCR 0xc008 0xc000 //EN_LP
LPSR 0xe008 0xe400 //Security Mode(SM)=01,Alarm Flag of LP section*1
LPPDR 0x41736166 0x41736166
------- ---------- -----------
*1: Indicates that the SRTC LP secured counter alarm has occurred.
Can anyone help me?
The most likely cause of the issue is the effect of the silicon erratum ENGcm12374, please refer to its description in the i.MX53 Chip Errata Rev.6 document, available on the processor's Documentation web page:
Have a great day,
Artur
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