Thanks for detail answer.
I still have one question. Can you recommend 4 layer PCB stack-up parameters.
With trace/width of 4/4mil or 5/5mil you would get around 100ohm differential impedance and 60ohm single-ended impedande using an equivalent height on each prepeg or core that separate outer layers from inner layers, I mean: 4mil for 4/4mil and 5mil for 5/5mil. That, as long as outer layers copper height be 0.7mil (18um) and taking Er as 4,2 or 4,3 (200Mhz). You can use free "Saturn PCB Design" tool to build your own stack-up: is not the best tool in the world but is free. Google it.
Our first design had only 4 layers (signal-gnd-pwr-signal) and still working. However I strongly recommend you to evaluate to use at least 6 layers. Reasons:
* PDN is poor with 4 layer.
* You will spend a lot of time routing the DDR.
* It is very difficult to achieve 100ohm differential / 50ohm single-ended.
* It is very difficult that no DDR net cross different power planes.
* It is not possible to fan-out all the nets of the processor.
* So on...
I think you're are talking about the diameter of the ball rather the diameter of the pad to use in PCB. We have a design with 12mil of pad diameter (aprox. 0.3mm) and works fine. I seem to remember that Freescale also used 12mil pads in the iMX28EVK: perhaps someone could confirm.