(i.MX28) Questions about how to set Mode Registers of DDR2.

[hikaruuruno]

Dear Community,

From the reference manual of i.MX28, I understand that HW_DRAM_CTL181 to 188 are the registers to set mode registers (MR/EMR) of ddr2.

But there are just 15 bits per MR/EMR even though each MR/EMR of ddr2 consists of 16 bits.

[Question 1]

Is the missing bit is BA2 which is always 0, and are the bit 0 to 12 (16 to 28) of HW_DRAM_CTL181 to 188 tied to A0 to A12 of ddr2, and are bit 13 and 14 (29 and 30) BA0 and BA1?

For example, if you want to set 50ohm Rtt to ddr2 of CS0, you need to set 0x00000014 to HW_DRAM_CTL183. Is my understanding right?

[Question 2]

Will the changes to MR/EMR be applied only after the bit 24 of HW_DRA_CTL16, WRITE_MODEREG, is set to 1?

In other word, if you just changed HW_DRAM_CTL181 to 188, nothing happens. To apply these changes, you also have to set 1 to the bit 24 of HW_DRA_CTL16, right?

I searched the logs of the Community and the documents but could not find an answer.

If I just overlooked something, please tell me where to find it.

Thank you in advance,

Hikaru

[Yuri]

  Some details about i.MX28 DRAM Controller settings may be found in comments of

DDR initialization tool :

https://community.freescale.com/docs/DOC-1455

Have a great day,
Yuri

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[hikaruuruno · Accepted solution]

Dear Yuri,

Thank you for the tip.

But the tool which is available in the page is not exactly I was looking for.

The tool for ddr2 was uploaded somewhere else.

Re: Memory controller setup for i.MX28 and i.MX50

At least the tools answers the question 1.

Best regards,

Hikaru Uruno