Hello,
There is this description on MIIGSK_CFGR register in i.MX25 RM page 25-30
NOTE:
The register should be written only when MIIGSK_ENR[READY] bit is negated
My customer would like to know what will happen if they write something in the MIIGSK_CFGR register when the READY bit is high.
Please let me know if you know it.
Best regards,
Nori Shinozaki
