i.MX 8M Plus ENET_QOS time synchronization

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i.MX 8M Plus ENET_QOS time synchronization

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dominic
Contributor II

Dear NXP team,

I'm looking at the i.MX 8M Plus processor and its ENET_QOS ethernet controller for use in real-time ethernet networks.

In some use cases we require precise time synchronization between the network (i.e. RX/TX timestamps, EST transmit schedule) and software timers (e.g. CLOCK_MONOTONIC, CLOCK_REALTIME on Linux).

For proper cross-timestamping we would need a way to get synchronized timestamps from the ENET_QOS timers (that is the base for network timestamps) and the ARM generic timer (which is the base for Linux CLOCK_*).

The TRM seems a bit sparse on details, or at least I couldn't find the necessary information:

  • How's the Cortex-A53 generic timer driven in the i.MX 8M Plus? I'm guessing it uses the system counter (SYS_CTR), but I couldn't find a definitive answer in the reference manual (Rev. 1).
    Chapter "4.11 System Counter (SYS_CTR)" in the TRM shows that the counter is fed to two processor platforms, but fails to tell us what these platforms are.
  • Is/How's the ENET_QOS external system time source connected in the i.MX 8M Plus? The corresponding chapter "11.7.2.5.6 IEEE 1588 System Time Source" is written from the 3rd-party IP's point of view. Is there maybe a way to use the SYS_CTR as the ENET_QOS system time source?
  • If the ENET_QOS external system time source is unusable for my purpose, is there a way to get hardware cross-timestamping between the ENET_QOS internal system time source and the A53 generic timer? E.g. is there any way to timestamp one of the ENET_QOS_1588_EVENTn_OUT signals in the SYS_CTR or A53 generic counter domain, or is there a way to generate a signal from the SYS_CTR / A53 generic counter to the ENET_QOS_1588_EVENT_n_IN/AUX_IN inputs?
    All I could find are some bits in IOMUXC_GPR_* registers like GPR_ENET_QOS_EVENT0IN_SEL and GPR_GPT1_CAPIN2_SEL that seem to be useful for synchronizing GPT1 and the ENET_QOS, but the general purpose timers are probably a lot less convenient to use from Linux (e.g. not a clocksource for CLOCK_*) and a lot more expensive to read from the A53 than the generic timer.

Regards,

Dominic

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Bio_TICFSL
NXP TechSupport
NXP TechSupport

Hello,

.The System Counter (SYS_CTR) is a programmable system counter, which provides a
shared time base to multiple processors. System Counter Timer is configured to generate a periodic interrupt at a certain interval.

2.As far as I know the ENET_QOS external system time source is unusable for your purpose. 

3.For the question 3, do you mean you want to use the SYS_CTR / A53 generic counter value to write to some register to sync with ENET_QOS_1588 ? I think this can't work.

For the different devices sync time with each other, you can reference the following doc:

Cognex-i-MX-8M-Plus-Synchronize-devices-outside-of-the-8M-Plus 

 

Regards

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