I want to allocate ethernet to linux, use openil1.1 , in I.MX8MM-EVK , we don't use eth0 in baremetal, but linux os use ethernet ,how to do ?
1. I modify dts file, in output/build/linux-OpenIL-v1.11-linux-imx-202104/arch/arm64/boot/dts/freescale/
imx8mm-evk-revb-baremetal.dts:
change "disabled" to "okay"
&fec1 {
status = "okay";
};
2. in dir/output/build/qoriq-bm-uboot-OpenIL-v1.11-Baremetal-202104$
cancel [ *] Enable Enable FEC MXC for baremetal this Item.
change [*] Enable FEC MXC for baremetal ----> [] Enable FEC MXC for baremetal
result : rebuild all , create sdcard.img, then burn to sd
linux os fail to boot......
like:
610069 bytes read in 41 ms (14.2 MiB/s)
36217344 bytes read in 1572 ms (22 MiB/s)
Booting from mmc ...
45795 bytes read in 18 ms (2.4 MiB/s)
start kernel.... .......
make menuconfig
[*] Enable baremetal features │ │
│ │ [*] Enable GPIO for baremetal │ │
│ │ (0) The core GPIO0 assigned │ │
│ │ (0) The core GPIO1 assigned │ │
│ │ (0) The core GPIO2 assigned │ │
│ │ (1) The core GPIO5 assigned │ │
│ │ [ ] Enable I2C for baremetal │ │
│ │ [ ] Enable IRQ for baremetal │ │
│ │ [*] Enable ICC for baremetal │ │
│ │ [ ] Enable QSPI for baremetal │ │
│ │ [ ] Enable FMAN for baremetal │ │
│ │ [ ] Enable USB for baremetal │ │
│ │ [ ] Enable PCIE for baremetal │ │
│ │ [ ] Enable FlexCAN for baremetal │ │
│ │ [ ] Enable ENETC for baremetal │ │
│ │ [ ] Enable SAI for baremetal │ │
│ │ [ ] Enable IFC for baremetal │ │
│ │ [*] Enable FEC MXC for baremetal │ │
│ │ (1) The core FEC MXC assigned
nxp document,
4.4.6.4 Ethernet
This section describes the Ethernet configuration settings for .MX8MM-EVK or I.MX8MP-EVK boards.
Disable the ethernet card from dts files:
&fec1 {
status = "disabled";
};
I.MX8MM-EVK has only one NIC, default status of eth0(fec1) is disabled. if user don't use eth0 in baremetal,
can enable fec1 in kernel dts file.
Confirm baremetal configuration
make menuconfig
ARM architecture --->
[*] Enable baremetal
[*] Enable NIC for baremetal
(1) which core that NIC is assigned to
Hi Peng
one can check enet clock with oscilloscope and configure it using IOMUXC_GPR_GPR1 register
(GPR_ENET1_TX_CLK_SEL) described in sect.8.2.4.2 General Purpose Register 1 (IOMUXC_GPR_GPR1) i.MX 8M Mini Applications Processor Reference Manual
Best regards
igor