Hello community,
I tested eMMC(rev 5.01) boot with i.mx6q sabre-sd USDHC2 I/F.
In fast boot mode (BOOT_CFG1[4] = 1), it can boot from boot partition both x8 and x4 DDR mode.
In normal boot mode (BOOT_CFG1[4] = 0) with x1,x4,x8 SDR mode, it can boot correctly.
But normal boot mode (BOOT_CFG1[4] = 0) with x4,x8 SDR mode, it can not boot both user partition and
boot partition of eMMC.
Base setting of USDHC boot eFUSE descriptions as following.
BOOT_CFG1[7:6] : 01 - boot from USDHC
BOOT_CFG1[5] : 1 - eMMC
BOOT_CFG1[4] : 0 - Normal boot
BOOT_CFG1[3:2] : 00 - High speed mode
BOOT_CFG1[1] : 0 - eMMC reset disable
BOOT_CFG1[0] : 0 - Throught the SD pad
BOOT_CFG2[7:5] : 101 - 4bit DDR
BOOT_CFG2[4:3] : 01 - USDHC-2
BOOT_CFG2[2] : 0 - Boot ROM default
BOOT_CFG2[1] : 0 - Boot acknowledge enable
BOOT_CFG2[0] : 0 - Use default values
MMC_DLL_DLY[6:0] : 0000000
Of case, I try to change BOOT_BUS_CONDITIONS [177] and
PARTITION_CONFIG (before BOOT_CONFIG) [179] in eMMC.
To boot eMMC with x4,x8 DDR in normal boot, need some more setting?
To see the eMMC bus signal log on ROM boot function,
I.MX6 output MMC_CMD and parameter based on the device boot flow in the IMX6DQRM Figure 8-11 and 8-16.
Switch command (CMD6) set PARTITION_CONFIG(0x01B34900), Hi-speed(0x03B9_0100) and BUS_WIDTH(0x03B70500) and eMMC respond with no error.
After send READ_MULTIPLE_BLOCK(CMD18) and read 512byte from sector 0,
i.MX6 stop MMC_CLK and no response any more.
Best regards,
Ishii.