eA53 resetting pin used by m7- iMX8M Nano EVK

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eA53 resetting pin used by m7- iMX8M Nano EVK

1,911 Views
anurag16doshi
Contributor III

Hey,

 

We are working on an imx8mn evk board and are using both the m7 as well as a53 core in the application. We have used a specific pin i.e GPIO5_IO9 from the M7 as an interrupt pin. This pin works perfectly fine when only the m7 core is running. During the boot up of the A53 core we observe that the pin looses its functionality as an interrupt pin.

 

For the purposes of understanding here is a brief overview of what we are working on the m7 and the a53.

 

M7- runs FreeRTOS, has an SPI application running and also has a pin configured as interrupt pin. We are using the ECSPI2 mux of the board for the SPI and ECSPI1_SS0 configured as an interrupt pin. We observe that if we comment out the variables being used in the ISR of the pin we observe that the SPI works fine transmitting and recieving messages.

 

A53- runs Android OS with rpmsg dtb. We have enabled ECSPI2 in the dts, as well as disabled anything related to uart3 and ecspi1 so that a53 does not use these port/muxes them.

 

Despite making the above changes we are running into the issue that the GPIO5_IO9 does not retain its Interrupt pin functionality.

 

For reference take a look at the dts of the rpmsg that we are using below->

 

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2019 NXP
*/

#include "imx8mn-ddr4-evk.dts"

/ {
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;

m_core_reserved: m_core@0x80000000 {
no-map;
reg = <0 0x80000000 0 0x1000000>;
};

rpmsg_reserved: rpmsg@0xb8000000 {
no-map;
reg = <0 0xb8000000 0 0x400000>;
};
};

sound-wm8524 {
status = "disabled";
};

wm8524: audio-codec {
status = "disabled";
};

rpmsg_i2s: rpmsg-i2s {
compatible = "fsl,imx8mn-rpmsg-i2s";
/* the audio device index in m4 domain */
fsl,audioindex = <0> ;
fsl,dma-buffer-size = <0x6000000>;
fsl,enable-lpa;
status = "okay";
};

sound-rpmsg {
compatible = "fsl,imx-audio-rpmsg";
model = "wm8524-audio";
cpu-dai = <&rpmsg_i2s>;
rpmsg-out;
};
};

/{

/delete-node/ regulator-audio-board;
/delete-node/ sound-ak5558;
};

&iomuxc {
/delete-node/ uart3grp;
/delete-node/ i2c3grp;
/delete-node/ i2c3grp-gpio;
};

&clk {
init-on-array = <
IMX8MN_CLK_UART4_ROOT
>;
};

/*
* ATTENTION: M core may use IPs like below
* ECSPI2, GPIO1/GPIO5, GPT1, I2C3, I2S3, WDOG1, UART4, PWM3, SDMA1/3 and PDM
*/


&ecspi2 {
status = "okay";
};
/*
&ecspi1 {
status = "okay";
};
*/

&mipi_csi_1 {
status = "disabled";
/delete-node/ port@0;
};

&i2c3 {
status = "disabled";
/delete-property/ pinctrl-0;
/delete-property/ pinctrl-1;
/delete-node/ gpio@20;
/delete-node/ ak4458@10;
/delete-node/ ak4458@12;
/delete-node/ ak5558@13;
/delete-node/ ak4497@11;
/delete-node/ ov5640_mipi@3c;

};

&pwm3 {
status = "disabled";
};

&rpmsg{
/*
* 64K for one rpmsg instance:
* --0xb8000000~0xb800ffff: pingpong
*/
vdev-nums = <1>;
reg = <0x0 0xb8000000 0x0 0x10000>;
status = "okay";
};

&sai3 {
status = "disabled";
};

&uart4 {
status = "disabled";
};

&wdog1 {
status = "okay";
};

&sdma1{
status = "disabled";
};

&sdma3 {
status = "disabled";
};

///delete-node/ uart3;


&uart3 {
/delete-property/ pinctrl-0;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
status = "disabled";
};

 

TIA

Anurag

 

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1,905 Views
igorpadykov
NXP Employee
NXP Employee

Hi Anurag

 

what bsp used in the case, for such issue one can try to rebuild all image from scratch.

May be recommended to try  latest Android Q10.0.0_2.5.0 (Linux 5.4 kernel) :

https://www.nxp.com/design/software/embedded-software/i-mx-software/android-os-for-i-mx-applications...

 

Best regards
igor

 

 

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1,894 Views
anurag16doshi
Contributor III

Hey @igorpadykov ,

 

Thank you for your prompt response about our issue, we are already using the Android BSP you mentioned on the a53, we also tried using the Linux BSP on a53 core available for the board and observed the same thing after boot of the a53 core.

We have built and rebuilt the img files required for boot of the Android OS multiplt times from scratch to no new developments, the behavior of the evk remains the same.

 

Any solutions for the issue would be highly appreciated.

 

Thanks,

Anurag Doshi

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1,889 Views
igorpadykov
NXP Employee
NXP Employee

Hi Anurag

 

one can try to add necessary peripheral permissions to atf imx8mn_bl31_setup.c, imx_rdc_cfg rdc[] :

https://source.codeaurora.org/external/imx/imx-atf/tree/plat/imx/imx8m/imx8mn/imx8mn_bl31_setup.c?h=...

 

Best regards
igor

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1,885 Views
anurag16doshi
Contributor III

Hey @igorpadykov,

 

We observe issues while kernel booting and is not related to bootloader issues. We observe that our pre-programmed pin's ISR stops working after our kernel starts booting. Our bootloader and works perfectly fine for the application we intend to use. If there is any other way you could suggest to resolve our issue, I would highly appreciate it.

 

TIA,

Anurag Doshi

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