about ADC sampling clock-2

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

about ADC sampling clock-2

ソリューションへジャンプ
727件の閲覧回数
goto11
Contributor III

hello,

 

Table 93. Recommended operating conditions for 12-bit ADC in .MX 7 Dual Family of Applications Processors Datasheet
Is it OK to make the RIEXT value larger than 250Ω (for example, from several kΩ to dozens of kΩ) when FCLK and FSOC are operated at close Min values?

What kind of problems will occur if the resistance value is increased?

 

best regards

Goto

ラベル(1)
0 件の賞賛
返信
1 解決策
632件の閲覧回数
igorpadykov
NXP Employee
NXP Employee

Hi Goto

>Is it OK to make the RIEXT value larger than 250Ω..

not, sorry.

>What kind of problems will occur if the resistance value is increased?

it may affect measurement accuracy, details can be found on web, for example :

Required output impedance for ADC input? - Electrical Engineering Stack Exchange 


Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

元の投稿で解決策を見る

0 件の賞賛
返信
1 返信
633件の閲覧回数
igorpadykov
NXP Employee
NXP Employee

Hi Goto

>Is it OK to make the RIEXT value larger than 250Ω..

not, sorry.

>What kind of problems will occur if the resistance value is increased?

it may affect measurement accuracy, details can be found on web, for example :

Required output impedance for ADC input? - Electrical Engineering Stack Exchange 


Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

0 件の賞賛
返信