Which ECC i.MX6 ROM code uses?

[simonlie]

Hello,

I'm using a i.MX6 Solo processor on a custom board. For my bachelor thesis I need to know which ECC the i.MX6 can handle. I want to boot MLO / Barebox from NAND flash. And don't know which ECC I have to provide the MLO / Barebox with. For example, the same problem I had to do for AM335x and there the ROM code uses BCH8.

Maybe somebody know the awnser or can me link a document. In the official Technical Manual i couldn't find any information about it.

Regards,

Simon

[simonlie]

Thank you for the C Code but this is not exactly what I need.

I need to know which ECC the i.MX6 wants to see if it tries to boot from NAND flash. If it is not always the same, where can I get this information from? I think it must be something like Hamming (1-Bit ECC) or BCH(4-40 Bit ECC).

[Yuri]

Please take a look at Chapter 17 [40BIT Correcting ECC Accelerator (BCH)] of the i.MX6 DQ Reference Manual.
The i.MX6 NAND controller (GPMI) uses it.

[JerryFan]

Hi Simon,

i.MX6SL BootROM use different ECC level for FCB(Firmware Config Block) and firmware(such as uboot). For FCB, it is Hamming, and 8 copied of FCB can be supported at most. For firmware, the ECC level can be configured in FCB, the max level is BCH40.

B.R

Jerry