I can find no explanation for what the csu_reset_b input, bit or event is in the SRC SRSR status register. Can someone point me to NXP info for this bit?
Thanks!!
Dear @sodacan
Thanks a lot for being so patient! and please accept my apologies for the delay on my response.
Regarding your question, the Chip Security Unit is appears there because it is a software reset that can be registered on this register to know when a SW reset was occurred by DMA. You may check for example RT1010 Reference Manual and see chapter about CSU to know about it. And as you may know, the SRC?SRSR is just a register that saves a 1 logic when mcu was reset by some of the shown modules just to have a reference or control.
Hope it helps!
Best Regards.
Pablo Avalos.
Hi @sodacan
Thanks a lot for reaching our technical support. I appreciate your patience.
I will take a look into it, and I will get back to you as soon as possible with a concrete answer. Please give me some more time to review it.
Thanks a lot.
Best Regards.
Pablo Avalos.