To change i.MX6DQ eCSPI SCLK polarity when idle.

[satoshishimoda]

Hello, I belong to a distributor of NXP Japan.

Our customer have a question about i.MX6DQ eCSPI.

Actually, he want to set the SCLK=high when SPI is idle.

We understand SCLK should be high when SPI is idle if SCLK_POL is set, but SCLK was low in idle.

So would you let me know whether there is other registers to change the SCLK polarity?

Should we change IOMUX setting also?

For your information, no pull-down is attached to SCLK line.

So we think i.MX6 pulls it to low.

Best Regards,

Satoshi Shimoda

[art · Accepted solution]

There are the ECSPIx_CONFIGREG[SCLK_CTL] bits that control the state of SPI clock signal when inactive. For more information, please refer to the Section 21.7.4 "Config Register (ECSPIx_CONFIGREG)" of the i.MX6Dual/Quad Reference Manual Rev.3 document.

Have a great day,
Artur

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[satoshishimoda]

I Arutur,

I heard our customer have set SCLK_CTL.

Are any other setting needed?

Best Regards,

Satoshi Shimoda

[art]

No, no other settings are required.

Have a great day,
Artur