Still issues with i.MX6DL, 2x512MB RAM, U-Boot and Linux (DT)

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Still issues with i.MX6DL, 2x512MB RAM, U-Boot and Linux (DT)

Contributor IV

Hello everyone,

slowly I'm running mad with this:

I have a new custom board with i.MX6DL connected to two RAM-Chips:


I created the U-Boot RAM-cfg with the LPDDR2-Script-Aid-v0.06. (See attached *.cfg-File and Script-Aid-XLS).

I tested several RAM-definitions in the U-Boot Header-File: (CFG-File and Header-File both with Interleaving and Non-Interleaving-RAM). The fat text seem to work with an i.MX6Quad.

/* RAM Configs */
/* RAM Configs interleaving */
#define PHYS_SDRAM                                        MMDC0_ARB_BASE_ADDR
#define PHYS_SDRAM_SIZE                             (512u * 1024 * 1024)
#define CONFIG_NR_DRAM_BANKS                1
#define CONFIG_SYS_SDRAM_BASE               PHYS_SDRAM
/* RAM Configs non interleaving */
/*#define CONFIG_NR_DRAM_BANKS            1
#define PHYS_SDRAM_1                                  MMDC0_ARB_BASE_ADDR
#define PHYS_SDRAM_1_SIZE                        (512u * 1024 * 1024)
#define CONFIG_SYS_SDRAM_BASE             PHYS_SDRAM_1
#define CONFIG_NR_DRAM_BANKS                2
#define PHYS_SDRAM_1                                   MMDC0_ARB_BASE_ADDR
#define PHYS_SDRAM_2                                   MMDC1_ARB_BASE_ADDR
#define PHYS_SDRAM_1_SIZE                         (512u * 1024 * 1024)
#define PHYS_SDRAM_2_SIZE                         (512u * 1024 * 1024)
#define iomem_valid_addr(addr, size)                 (addr >= PHYS_SDRAM_1 && addr <= (PHYS_SDRAM_2 + PHYS_SDRAM_2_SIZE))
#define CONFIG_SYS_SDRAM_BASE               PHYS_SDRAM_1


And I tried to configure the <memory> entry in Devicetree with several configurations:

memory {
         device_type = "memory";
         reg = <0x10000000 0x40000000>; /* working with QUAD */
         /*reg = <0x10000000 0x20000000 0x80000000 0x20000000>;*/

Every Test ends in the same result: Linux boots, but when I run <memtester> the whole System freezes including a Heartbeat-LED.

Somewhere I do something terribly wrong, but where? Why does it work with the Quad-Core but not with DualLite?

I think I don't understand CS0_END-Parameter! (And some other things, too.)


I can provide more Information if this helps.

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NXP TechSupport
NXP TechSupport

Hi Steffen

was board able to pass latest ddr test

i.MX6/7 DDR Stress Test Tool V3.00 

"memtester" issues may point to power supplies problems, like

instabilities, ripples, so may be recommended to check them using

IMX6DQ6SDLHDG, Hardware Development Guide for i.MX 6Quad, 6Dual, 6DualLite, 6Solo Families of Applic...

Best regards
Note: If this post answers your question, please click the Correct Answer button. Thank you!

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