Some Experience When Enable MIPI Camera

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Some Experience When Enable MIPI Camera

NXP Employee
NXP Employee

1. Debug steps for customer MIPI sensor

Debug steps for customer MIPI sensor.docx is the doc about how to debug MIPI sensor.


2. SabreSD default setting

In SabreSD board, ov5642 is connected to CSI0 parallel port, ov5640_mipi is connected to MIPI CSI port.

In BSP default setting, ov5640_mipi is routed to IPU0, CSI1. According to the doc, the virtual channel in MX6x side is 1, so virtual channel 1 should be enabled in camera sensor side. In driver ov5640_mipi.c, the code is “ov5640_set_virtual_channel(ov5640_data.csi)”.


3. MIPI DPHY clock setting

According to the doc,  MIPI DPHY clock should match camera sensor clock.

If the clocks are not matched, the MX6x MIPI_CSI Error state register MIPI_CSI_ERR1 is not 0, it would be 0x3, “Start of Transmission Error on data lane”.

So when enable new MIPI camera, need to measure the frequency of clock lane, or calculate from the related sensor register, then configure MPII DPHY clock.

For example, if the clock lane frequency is 128MHz, the clock range should be 250-270MHz because of DDR clock mode, so write 0x08 to CSI2_PHY_TST_CTRL1. One function of MIPI_CSI_PHY_TST_CTRL1 is setting the MIPI DPHY clock, this function is not described in MX6DQ RM revD.

The patch is


diff --git a/drivers/mxc/mipi/mxc_mipi_csi2.c b/drivers/mxc/mipi/mxc_mipi_csi2.c

index 1f051df..d53aaf5

--- a/drivers/mxc/mipi/mxc_mipi_csi2.c

+++ b/drivers/mxc/mipi/mxc_mipi_csi2.c

@@ -286,7 +286,7 @@ int mipi_csi2_reset(struct mipi_csi2_info *info)

mipi_csi2_write(info, 0x00000002, CSI2_PHY_TST_CTRL0);

mipi_csi2_write(info, 0x00010044, CSI2_PHY_TST_CTRL1);

mipi_csi2_write(info, 0x00000000, CSI2_PHY_TST_CTRL0);

- mipi_csi2_write(info, 0x00000014, CSI2_PHY_TST_CTRL1);

+ mipi_csi2_write(info, 0x00000008, CSI2_PHY_TST_CTRL1);

mipi_csi2_write(info, 0x00000002, CSI2_PHY_TST_CTRL0);

mipi_csi2_write(info, 0x00000000, CSI2_PHY_TST_CTRL0);


4. Virtual channel

For some mipi camera sensor, such as Samsung s5k4ec, the virtual channel is fixed to 0, there is no register in the sensor to configure it to other value.

We can configure the mipi camera to IPU0 CSI0 so the virtual channel in MX6 side is 0.

If virtual channel in camera side and MX6 side is not same, there is no error in mipi state and error register, but we will see below log when mx6 capture image

        ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0
        VIDIOC_DQBUF failed.

5. Mipi and CSI camera on same CSI port

If the parallel sensor is connected to CSI0 in the board, to enable dual camera, need to apply patch 0001-support-mipi-and-parallel-camera-on-same-csi-port.patch




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26 Replies

Contributor IV

When I click on the link above,, I am forwarded to an unauthorized page.  Is this an internal forum?

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NXP Employee
NXP Employee

You can find it in the attachment.

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Contributor IV


Sorry, the document you have referenced is not accessible. Can you check this?

The reason that I'm asking is that I'm trying to debug MIPI for a camera driver I've been working on (Aptina AR0330) and I'm interested to know more about points 3 and 4. Both points mention something about the referenced document which I can't get any access to.


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Contributor I

Hi Wang,

I am using omini vision ov9740 mipi camera on imx6q.

I am getting "ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0".

Could you please help us & give idea to debug this issue.

The camera interface is mipi & connected to CSI1 & ipu0.

The mipi register value whic i got are below



MIPI_CSI_ERR2 0x10  

The board config file setting for mipi,v4l2capture & sensor are below.


static struct mipi_csi2_platform_data mipi_csi2_pdata = {

.ipu_id  = 0,

        .csi_id = 1,

        .v_channel = 0,

        .lanes = 2,

        .dphy_clk = "mipi_pllref_clk",

        .pixel_clk = "emi_clk",



static struct fsl_mxc_capture_platform_data capture_data[] = {


.csi = 0,

.ipu = 0,

.mclk_source = 0,

.is_mipi = 0,

        }, {

.csi = 1,

.ipu = 0,

.mclk_source = 0,

.is_mipi = 1,



3)ov9740 sensor

static struct fsl_mxc_camera_platform_data mipi_csi2_data = {

        .mclk = 24000000,

.mclk_source = 0,

        .csi = 1,

        .io_init = mx6q_mipi_sensor_io_init,

        .pwdn = mx6q_mipi_powerdown,


The camera image setting looks fine i.e(width(1280), height(720), pixformat(UYVY) ,DATA_WIDTH 8bit by debug print in mxc_v4l2_capture.c as well as in sensor file).

The sensor is connected to mipi via two lane.

Mipi is configure for two lane & sensor is sending data on one lane only(as per sensor setting).

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Contributor IV

Hi Wang,

I look your text, and think you have a lot knowledge about mipi camera for i.mx6q.

I have a problem with mipi and want you help me.

I am using a custom mipi camera with two modes:

first:     1280x720@30fps      4lanes

second:     2560x1440@30fps    4lanes

Now i can capture correct images from camera on first mode.

But when camera work on second mode, the images i get is not correct,

and IPU error: IPU1_INT_STAT_5=0x00000001 is happedned.

About this error, RM says it is IPU clock is not enough for the requirement.

Does this means my camera is too quick for i.mx6q?

The problem is i can not set camera to output a slower fps.

So i can't confirm where is the problem.

According to the RM, MIPI 4 data lanes port supports up to 400MByte/sec

And now my camera is 2560x1440x30x2=221.184MByte/sec, that is not over the 400MByte/sec.

Do you have any ideas about this? Thank you very Much.

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Contributor IV


I have got my 2560x1440@30fps mipi camera worked.

The reason is ccm_pixel_clk is not enough.

When up the aix_clk_root, it works fine.

I want to know how this value is decided.

Is there anyone know about this?