Hello,
I want to design a solution based on The IMX6.q, which dose data acquisition.
The data acquisition device is FPGA, and the reading and writing speed of data acquisition is 200MB/s.
Now, the FPQA device communicates with IMX6.q through by EIM control.
However, maximum frequency of the EIM main clock is 133Mhz.
My questions are as following:
1.The EIM can support 200MB/s speed?
2.If it's ok, how to design it?(Burst Clock mode + SDMA or not)
Thanks.
Solved! Go to Solution.
Hi Li
max. BCLK frequency is defined as 104MHz, sect.4.9.3 External Interface Module (EIM)
i.MX6DQ Datasheet (rev.4, 7/2015)
http://cache.freescale.com/files/32bit/doc/data_sheet/IMX6DQCEC.pdf
With SDMA one can achieve 8 beats bursts. So in theory EIM can support 200MB/s speed.
Best regards
igor
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Hi Li
max. BCLK frequency is defined as 104MHz, sect.4.9.3 External Interface Module (EIM)
i.MX6DQ Datasheet (rev.4, 7/2015)
http://cache.freescale.com/files/32bit/doc/data_sheet/IMX6DQCEC.pdf
With SDMA one can achieve 8 beats bursts. So in theory EIM can support 200MB/s speed.
Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
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