I have a problem that SRTC is not Enabled at cold start.
I checked the status register. It seems that SRTC has shifted to the Failure state, because it detected some alarms.
LPSR (Status Reg) = 0x00000065
- EAD bit = 1: Security alarm detected
- TR bit = 1: Counter has reached its maximum value
- CTD bit = 1: Clock Tampering Detected.
- TRI bit = 1: Time read is invalidated.
LPGR (General Purpose Reg) = 0x82400000
- SW_ISO = 1: SRTC is isolated from the rest of the SoC.
Is it able to be enabled when SRTC is in a Failure state?
Best Regards,
Dear Yixing-san,
Thank you for your reply.
This problem has not been solved yet.
However, our customer gave up about this problem.
For that reason, I will close this discussion.
Best Regards,
Hi, Weisong Liu-san,
Thank you for your reply.
> 1, does the SRTC work properly when you re-initiate the SRTC atfer cold power-on?
=>
There is a case where the SRTC does not work properly.
"1" cannot be set to EN_LP gas bit of a LPCR register.
And 0x41736166 value cannot be written to LPPDR register.
(in this case, Value of LPPDR register is 0x4944c5a8)
> 2, when the issue occurs, what's the SRTC time? the data is reseted to "0"?
=>
LPSCMR and LPSCLR register are 0x00000000.
Please advise of your findings.
Hi, Yuuki
please enclose the schmetic of power section for i.mx51 here.
thanks
Dear Weisong Liu-san,
Thank you for your reply.
I am sorry, I cannot enclose a schmetic here.
Is there any method of sending it only to you?
Best Regards,
Hi, Yuuki
please send to b19830@freescale.com, I will review it and send feedback here.
Dear Weisong Liu-san,
Thank you for your reply.
I send the schematic of a power section to you.
Would you check this?
Best Regards,
Yuuki
Has your question been answered, or do you need help form SW team?
Regards,
Yixing
Hi, Yuuki
if you make sure RTC_1V2 and 32k input of i.mx51 are good in off mode.
we may need help from software AE.
Hi, Yuuki
I saw the schematic.
you have ensured that RTC_1V2 is ok when powering off, right?
so do you also please check if CLK32KMCU is connected to 32K input of i.mx51 and enabled in MC13892 in off mode?
Hi, Yuuki
I saw the schematic.
you have ensured that RTC_1V2 is ok when powering off, right?
so do you also please check if CLK32KMCU is connected to 32K input of i.mx51 and enabled in MC13892 in off mode?
Hi, Yuuki
how do you supply NVCC_SRTC? is it a coin cell when powering off?
Dear Weisong Liu-san,
Thank you for your reply.
As for NVCC_SRTC, 1.2V is supplied when powering off.
Hi, Yuuki
a few questions:
1, does the SRTC work properly when you re-initiate the SRTC atfer cold power-on?
2, when the issue occurs, what's the SRTC time? the data is reseted to "0"?