RS485 iMX93

LorenzoSpadaro

Hi,

I am currently trying to set up an RS485 line using the lpuart2 and lpuart7. In my device tree i added the lines:

&iomuxc {

	pinctrl_uart2: uart2grp {	// RS485_1
		fsl,pins = <
			MX93_PAD_UART2_RXD__LPUART2_RX		0x31e
			MX93_PAD_UART2_TXD__LPUART2_TX		0x31e
			MX93_PAD_SAI1_TXC__LPUART2_CTS_B   0x31e
	
		>;
	};


	pinctrl_uart7: uart7grp { // RS485_2
		fsl,pins = <
			MX93_PAD_GPIO_IO08__LPUART7_TX		0x31e	// TX
			MX93_PAD_GPIO_IO09__LPUART7_RX		0x31e	// RX
			MX93_PAD_GPIO_IO10__LPUART7_CTS_B       0x31e	// DE
		>;
	};

};

for the pin control and these:

&lpuart2 { // RS485_1 pin: p1-72[TX] p1-19[RX] p1-53[DE]
	fsl,uart-has-rtscts;
	rts-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
    linux,rs485-enabled-at-boot-time;  // rs485 abilitata fin da subito al boot
	rs485-rts-active-high;
	rs485-rts-delay = <1 1>;
};

&lpuart7 { // RS485_2 pin: p1-39[TX] p1-41[RX] p1-37[DE]
	uart-has-rtscts;
	rts-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
	linux,rs485-enabled-at-boot-time;  // rs485 abilitata fin da subito al boot
	rs485-rts-active-high;
	rs485-rts-delay = <1 1>;
};

For the peripherals.

I am trying to test the RS485 with a python script. I am currently able to write, but I am not able to read; that is because RTS pin always high. I haven't find a way to make the machine use in the correct way the RTS/CTS pin from the som.

I checked the compatible is the imx93.dtsi file and it seems that the corresponding driver [fsl_lpuart.c] never access the device tree. Instead i have seen that the driver [imx.c] load from device tree some settings about RS485. Is it possible that there are some correlations? Do you know how can i configure the device tree (or the python script in order to make things work?

I attach all the device tree used in the board and the python script used for test.

Thank you in advance

Best regards

Lorenzo

LorenzoSpadaro

Hi Chavira,

your solution worked!

After some elaborations, i optimized it like this:

pinctrl_uart2: uart2grp { // RS485_1 pin: p1-72[TX] p1-19[RX] p1-53[DE]
fsl,pins = <
MX93_PAD_UART2_RXD__LPUART2_RX 0x31e
MX93_PAD_UART2_TXD__LPUART2_TX 0x31e
MX93_PAD_SAI1_TXD0__LPUART2_RTS_B 0x31e

>;
};

pinctrl_uart7: uart7grp { // RS485_2 pin: p1-39[TX] p1-41[RX] p1-37[DE]
fsl,pins = <
MX93_PAD_GPIO_IO08__LPUART7_TX 0x31e // TX
MX93_PAD_GPIO_IO09__LPUART7_RX 0x31e // RX
MX93_PAD_GPIO_IO11__LPUART7_RTS_B   0x31e   // DE
>;
};

It is useless all this part that i had in my dtb (now erased):

&lpuart2 { // RS485_1 pin: p1-72[TX] p1-19[RX] p1-53[DE]
	fsl,uart-has-rtscts;
	rts-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
    linux,rs485-enabled-at-boot-time;  // rs485 abilitata fin da subito al boot
	rs485-rts-active-high;
	rs485-rts-delay = <1 1>;
};

&lpuart7 { // RS485_2 pin: p1-39[TX] p1-41[RX] p1-37[DE]
	uart-has-rtscts;
	rts-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
	linux,rs485-enabled-at-boot-time;  // rs485 abilitata fin da subito al boot
	rs485-rts-active-high;
	rs485-rts-delay = <1 1>;
};

This is because the compatible for the LPUART is different than the previous processors (imx6 and imx8), and none of these tags of the dtb are not used anymore.

Another important thing, in python3.10 is necesaary to initialize the peripheral like this:

port = serial.Serial(port="/dev/ttyLP6", baudrate=19200, timeout=2, write_timeout=2)
port.rs485_mode = serial.rs485.RS485Settings()

So it is necessary to add the second line.

In this way the data enable is correctly used by the peripheral, like you see in this oscilloscope pic with tx[y], de[v] and rx[b]:

View solution in original post

Chavira

Hi @LorenzoSpadaro!

Thank you for contacting NXP Support!

You should configure the pins in devcie tree like the UART5 of your dts.

Best Regards!

Chavira

LorenzoSpadaro

Which one?
This in the ucm-imx93.dts file:

	pinctrl_uart5: uart5grp { // RS232 pin: p1-67[TX] p2-71[RX]
		fsl,pins = <
			MX93_PAD_DAP_TDI__LPUART5_RX				0x31e
			MX93_PAD_DAP_TDO_TRACESWO__LPUART5_TX		0x31e
		>;
	};

Or this in the ucm-imx93-pinctrl.dtsi file:

pinctrl_uart5: uart5grp {
	fsl,pins = <
		MX93_PAD_GPIO_IO01__LPUART5_RX		0x31e
		MX93_PAD_GPIO_IO00__LPUART5_TX		0x31e
		MX93_PAD_GPIO_IO02__LPUART5_CTS_B	0x31e
		MX93_PAD_GPIO_IO03__LPUART5_RTS_B	0x31e
		MX93_PAD_GPIO_IO18__GPIO2_IO18		0x31e
	>;
};

In case it is the first one, how the peripheral knows which is the pin to use for the DataEnable function of the RS485 tranceiver [THVD1420DR]?

Chavira