NAND Implementation for IMX536

[leonardosantos]

Hello,

I am working on a imx53_loco based board and my last modification was to boot  the system through a NAND Flash memory. All parts of the system (hardware, bootloader, kernel and rootfs) are correctly settled-up and are working seamless (No "dmesg" prints indicating read/write errors, Read/Write from all the system components alike).

However, i don't know how to ensure the system is correctly adjusted and even if it will recover bad bits and set as "bad blocks" erroneous blocks of memory.

My first thought was to change the read function in NAND driver and randomly replace a bit in the page read to force the system to recover the information. Still, it doesn't cover the write process and i don't think that's the best practice for testing NAND operation.

I would be glad if anyone could help by suggesting some method, hardware or software for test the NAND operation and configuration in the hole system.

Some information:

Based on IMX53 loco board

fsl-community-bsp v1.8

Best regards,

Leonardo Ramos dos Santos

[igorpadykov]

Hi Leonardo

seems one can generate image for less ecc level than required and check it.

For example for 16 bit ecc nand generate 8 bit ecc image (BOOT_CFG3[4:3],

Table 7-11. NAND Boot eFUSE Descriptions).

Best regards
igor
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[leonardosantos]

Hi Igor.

Thanks for your help.

Maybe this approach can show if the system can find badblocks for my configuration of ECC. Still, this technique sounds like a partial table test, not a complete NAND test.

I am trying to find a solution without changing neither the system nor the NAND modifications I've made, because I could change the behavior of the system unintentionally and mess with the test.

What I'm looking for is a automated solution of Laboratory Test level. This way if in the future I need to make another changes in the system, I could just ran the test again and ensure the NAND still works as I expect.

Best Regards,

Leonardo Ramos dos Santos