LPDDR timing & DRAM size in U-Boot

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LPDDR timing & DRAM size in U-Boot

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dpog
Contributor IV

I'm facing a problem with the LPDDR4 on our custom board solution. The kernel loads normal, but the u-boot states that the DRAM is 2GB, but the board provides only 1GB. I tried changing the PHYS_SDRAM_SIZE in imx8mm_evk.h in include/configs, but it showed no effect.

We also trained the memory with the tool and adjusted the lpddr4_timing.c with the new values, which only lead to the kernel stating:

[ 11.305610] ddrc freq set to high bus mode
[ 12.400583] ddrc freq set to low bus mode
[ 15.154931] ddrc freq set to high bus mode
[ 16.240571] ddrc freq set to low bus mode
[ 40.245321] ddrc freq set to high bus mode
[ 41.329285] ddrc freq set to low bus mode
[ 952.117211] ddrc freq set to high bus mode
[ 953.201563] ddrc freq set to low bus mode
[ 982.579697] ddrc freq set to high bus mode
[ 983.665295] ddrc freq set to low bus mode

Additional: the kernel only boots because I give the correct memory size in the bootargs, as the memory is not correctly described somehow.

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AldoG
NXP TechSupport
NXP TechSupport

Hello,

Changes to PHYS_SDRAM_SIZE are correct, did you made changes to uboot device tree as well?
https://github.com/nxp-imx/uboot-imx/blob/lf_v2022.04/arch/arm/dts/imx8mm-evk.dtsi#L16

Also, please make sure that DDR stress test pass and all calibration is done correctly.

Best regards,
Aldo.

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dpog
Contributor IV
Out of curiosity I set the PHYS_SDRAM_SIZE to higher values, and the corresponding value is shown in the boot log, but I somehow cannot get below the 2Gb
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dpog
Contributor IV
I didn't change the u-boot device tree at first, so I did that now. But to no effect. I also commented out the "memory"-node in the imx8mm.dtsi, as it declares the Memory to be 2Gb, our design only uses 1Gb.

memory@40000000 {
device_type = "memory";
reg = <0x0 0x40000000 0 0x40000000>;
};

The stress test passed, and the resulting calibration code was added, as stated.
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