We have a problem capturing 1080p30 MIPI video on iMX8Mini (MIMX8MM1CVTKZAA).
The first frame sent does not align correctly, we have data left in the RXFIFO at the start of the second frame. It seems that the DMA is not completing and the RXFIFO is not being emptied. We have tried different settings for RXFIFOlevel and INCR - the amount of data left in the RXFIFO changes but the DMA never seems to completely empty the RXFIFO for the first frame. After this the system works correctly and the DMA empties the full frame from the RXFIFO to the frame buffer (the image has a constant shift).
To debug this we want to manually read the RXFIFO register. We are using csi_read to access the RXFIFO register. We get a value back but on subsequent reads we continuously get the same value instead of the next value.
Is the RXFIFO register cached (explaining why it always has the same value)?
How can we read the register until the RXFIFO is empty?
Once the RXFIFO is empty what value will a read deliver?
