IMX93 OCOTP Permissions

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IMX93 OCOTP Permissions

1,050件の閲覧回数
Jarbo
Contributor II

Hello,

I am working with an IMX93 and I am trying to record the MAC fuses (0x4ec and 0x4f2), the problem I am encountering is that it is giving me a permissions error and I cannot find OCOTP_LOCK to be able to record these fuses, could you please help me?

Thank you so much!

PS: NVMEM_PATH = "/sys/devices/platform/soc@0/47510000.efuse/fsb_s400_fuse0/nvmem"

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393件の閲覧回数
phil331
Contributor I

Hi,

I'm also looking how I can program the i.MX93 MAC addresses into eFUSE...

I notice the kernel "fsl,imx93-ocotp" (imx-ocotp-fsb-s400.c) driver only support reads and does so via the "fsl,imx93-ele" driver. It looks like only Edgelock Enclave can do the actual read/writes to eFUSE. Is there no way to do this from user space?

So, we can only program the MAC addresses using uboot, right?

Thanks

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320件の閲覧回数
phil331
Contributor I

Some info I found out that may be useful...

The i.MX93 rev.0 silicon uses different byte layout for MAC2 in eFUSE than rev.1 and later. See https://github.com/nxp-imx/uboot-imx/blob/lf_v2023.04/arch/arm/mach-imx/imx9/native/soc.c#L537

With the lf-6.1 BSP, you can only program eFUSE from u-boot, but lf-6.6 BSP adds the ability to program them from Linux userspace.

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844件の閲覧回数
Jarbo
Contributor II

Hello again,

I still have doubts, I'm trying to write the fuses directly through the boot and write the MACs (from the image, extracted from the security manual) and I don't know where the lock fuse is to enable them, I can only read them, but I can't write.

Jarbo_1-1715585442342.png

Jarbo_2-1715586057934.png

Jarbo_3-1715586087556.png

 

 

 

176件の閲覧回数
vikki
Contributor I
From which document you got this "fuse bank" mapping?
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832件の閲覧回数
JorgeCas
NXP TechSupport
NXP TechSupport

Hello,

The way you burned the fuse is correct.

Could you please try with the next?

fuse sense <bank> <word> [<cnt>] - sense 1 or 'cnt' fuse words, starting at 'word'

Also, did you check it on user space?

Best regards.

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826件の閲覧回数
Jarbo
Contributor II

this?

Jarbo_0-1715612545506.png

 

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773件の閲覧回数
JorgeCas
NXP TechSupport
NXP TechSupport

Yes, that command.

There is a lock bit field for MAC address fuses that is:

COM_DEVICE_ID1_LOCK in bank 0 word1 bit [6~8] and the behavior is as mentioned on the next image.

JorgeCas_0-1715695418810.png

Could you please confirm?

Best regards.

 

 

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769件の閲覧回数
Jarbo
Contributor II

Thanks for the response again,

I have read the BANK 0 WORD 1 and I have 2493, I have been able to observe the bits that you indicate and I see that I have it protected, should I write 000 at this address? that is 2413?

Jarbo_0-1715697009227.png

Jarbo_1-1715697049881.png

 

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746件の閲覧回数
JorgeCas
NXP TechSupport
NXP TechSupport

Hello,

That is correct, usually these lock bits are unprotected.

Best regards.

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734件の閲覧回数
Jarbo
Contributor II

I can't write these fuses, any other solution please?

Jarbo_1-1715755020603.png

Jarbo_2-1715755063364.png

 

 

 

 

 

 

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721件の閲覧回数
JorgeCas
NXP TechSupport
NXP TechSupport

Hello,

 

Have you blown those fuses before?

 

I read them from EVK boards (A0 and A1 silicon revision), and the default value is the next:

 

JorgeCas_1-1715804077290.png

 

Unfortunately, I cannot burn eFuses on our EVK boards, since we use them to test.

 

Best regards.

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979件の閲覧回数
Jarbo
Contributor II

Hello, the steps are as follows:

nvmem_path = "/sys/devices/platform/soc@0/47510000.efuse/fsb_s400_fuse0/nvmem"
with open(nvmem_path, 'br+') as f:
    f.seek(seek_offset)
    f.write(pack('<L', value_to_write))

and it tells me that I don't have permissions

The offsets used are (0x4ec)

How should I do so that I could write the fuses of the Mac without it returning a permissions error?

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973件の閲覧回数
JorgeCas
NXP TechSupport
NXP TechSupport

Hello,

 

I think that error is related to the offset.

 

On i.MX 93 one bank is equals to 8 words, so a bank cannot be more than 8 words, in the fuse map attached to the i.MX93 RM, “Bank 3 word 24” in reality is Bank 3 word 0, here a part of the correct order:

 

JorgeCas_0-1715004929212.png

Here a small table to understand the offsets:

 

JorgeCas_1-1715004929212.png

 

In the “i.MX Linux User's Guide”, section “13.2 NVMEM provider OCOTP”, says that “The 2nd parameter is from the first data in property reg of a NVMEM consumer, and this offset represents the OCOTP shadow register, to which a eFuse address is mapped.”, so the offset of the first word of each Bank is the number of the Bank times 0x20, for example if you want to kwon the offset of Bank 3 Word 0, the offset is 3 * 0x20 = 0x60, if you want to know the offset of Bank 1 Word 1, the offset is (1 * 0x20) + 4 = 0x24, offset of Bank 2 Word 3 = (2 * 0x20) + (0x4 * 0x3) = 0x4C.

 

Best regards.

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963件の閲覧回数
Jarbo
Contributor II

Hello,

Thank you for the quick reply JorgeCas!

I understand what you are saying, but I am struggling to find the right offset value for the MAC addres 1 and 2. In the IMX93 fusemap document there is some flags with specific bank addres and word offset and other like the MAC are "Packed_FuseIndex":

 

Jarbo_1-1715008205775.png

 

Should I just divide the "Packed_FuseIndex" by 32 to get the offset?

Jarbo_2-1715008227186.png

Still getting the permissions problem with all the test done. I can read without any problem the fuses but can't write yet.

Jarbo_0-1715008935962.png

 

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960件の閲覧回数
JorgeCas
NXP TechSupport
NXP TechSupport

Do you have access to the security reference manual?

Best regards.

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956件の閲覧回数
Jarbo
Contributor II

No, I don't. I have requested it but I haven't been granted access. 

The formula for get the offset (Bank number * 8 + word) 39*8 + 317 = 629 that is very far away from 10144 :`)

Jarbo_0-1715009731829.png

 

I have attached in the DTS the following declarations:

Jarbo_1-1715009801635.png

 

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953件の閲覧回数
JorgeCas
NXP TechSupport
NXP TechSupport

Hello,

The security reference manual word number is different compared to the Excel document.

Best regards.

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951件の閲覧回数
Jarbo
Contributor II

Ok, i will wait for the access

And for the DTS? Do you think it is alright?

 

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946件の閲覧回数
JorgeCas
NXP TechSupport
NXP TechSupport

I would leave it as is on our EVK reference device tree:

ocotp: efuse@47510000 {
	compatible = "fsl,imx93-ocotp", "syscon", "simple-mfd";
	reg = <0x47510000 0x10000>;
	#address-cells = <1>;
	#size-cells = <1>;

	imx93_uid: soc-uid@c0 {
		reg = <0xc0 0x10>;
	};

	eth_mac1: mac-address@4ec {
		reg = <0x4ec 0x6>;
	};

	eth_mac2: mac-address@4f2 {
		reg = <0x4f2 0x6>;
	};

	imx93_soc: imx93-soc {
		compatible = "fsl,imx93-soc";
		nvmem-cells = <&imx93_uid>;
		nvmem-cell-names = "soc_unique_id";
	};
};

Best regards.

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1,017件の閲覧回数
JorgeCas
NXP TechSupport
NXP TechSupport

Hello,

Could you please share the process you are following and the log error?

Best regards.

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