IMX8ULP Integrate LPSPI with FreeRTOS ping-pong example

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IMX8ULP Integrate LPSPI with FreeRTOS ping-pong example

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shaunakk
Contributor I

I am trying to integrate the lpspi_edma_b2b_transfer_master example with the rpmsg_lite_pingpong_rtos example. When I run the LPSPI EDMA standalone example I don't run into any problems, but when running it in the RPMSG example, the callback  LPSPI_MasterUserCallback never fires. 

I have tried setting the interrupt priorities: 

    NVIC_SetPriority(LPSPI1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
    NVIC_SetPriority(DMA0_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
    NVIC_SetPriority(DMA0_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
I have a feeling the app SRTM is messing with the pins on header J23 (LPSPI1)
I have also removed the line to sync with u-boot, as app_srtm seems to handle that. Attached is my project.
Thanks!
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Zhiming_Liu
NXP TechSupport
NXP TechSupport

Hi @shaunakk 

Please add more debug messages or provide your debug results for us to better analyze this case.

 

 

 

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shaunakk
Contributor I

If you look at my code, it is just getting stuck on the line where it waits for isTransferCompleted to be true. I don’t have any other debug logs, all I know is the callback isn’t getting called and there is no data sent on LPSPI1

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Zhiming_Liu
NXP TechSupport
NXP TechSupport

Check your source code and find that you didn't add BOARD_SetTrdcGlobalConfig, please do more double-check after migrating these two examples.

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shaunakk
Contributor I

Adding that doesn't seem to help, It freezes after SRTM init:

LPSPI board to board edma example.
This example use one board as master and another as slave.
Master and slave uses EDMA way. Slave should start first.
Please make sure you make the correct line connection. Basically, the connection is:
LPSPI_master -- LPSPI_slave
CLK -- CLK
PCS -- PCS
SOUT -- SIN
SIN -- SOUT
GND -- GND
Start SRTM communication

 

 

 

This is in the LPSPI example:

if (BOARD_IsLowPowerBootType() != true) /* not low power boot type */
    {
        BOARD_HandshakeWithUboot(); /* Must handshake with uboot, unless will get issues(such as: SoC reset all the
                                       time) */
    }
    else /* low power boot type */
    {
        BOARD_SetTrdcGlobalConfig();
    }
 
 
 
I didn't include BOARD_SetTrdcGlobalConfig() because this isn't a low power boot, I want to run the A35 and M33 cores together.
 
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Zhiming_Liu
NXP TechSupport
NXP TechSupport

The RDC is resource manager between M core and A core, so we should config it. For no low power boot, you can refer  the BOARD_HandshakeWithUboot function. It also configure the RDC.

Zhiming_Liu_0-1700447357309.png

 

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