IMX8QXP Memory Map and Peripherals

[mehran_ali]

Hi,

I want to use the user CM4 available on the IMX8QXP MCU to port an embedded-bare-metal OS on it.

I have a Document Numbered: IMX8DQXPRM Rev. D, 11/2018 to referer to for the memory map and the system peripheral resources information.

I have a few questions about the above-mentioned document though.

1. The base addresses of the peripheral modules can be found in the CM4 memory map(Section 2.2.9.2 CM4 Memory Map - Local View) but not all the peripherals are listed there, for example, If I need to use the GPT which is part of the LSIO subsystem, I cannot see the base address of the GPT peripheral registers block, available in the "Section 2.2.9.2 CM4 Memory Map - Local View". Does this essentially mean that GPT is not directly accessible from user CM4 complex?
2. In the document Numbered, "IMX8DQXPRM Rev. D, 11/2018", it is mentioned system hardware resources can be used through API calls to the SCU firmware. Does the absence of the GPT module from the user CM4 memory map mean that GPT can only be controlled through the API calls to SCU firmware?

Best Regards,

Mehran

[diegoadrian]

Hello, 

Unfortunately, the i.MX8QX is still on preproduction and we do not have any preliminary information about the product. I recommend you to go with your DFAE or with your sales representative. He will help you with this problem.

Best regards,

Diego.