I think this is a poor answer to the question. OP is asking for the reasoning behind the "0x4000" being applied.
This answer is much better, but took me longer to find: https://community.nxp.com/t5/i-MX-Processors/Device-tree-pinctrl-32-bit-or-16-bit/m-p/848643/highlig...
In short, Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt from the linux-imx repo describes
Bits used for CONFIG:
NO_PAD_CTL(1 << 31): indicate this pin does not need config.
SION(1 << 30): Software Input On Field.
Force the selected mux mode input path no matter of MUX_MODE functionality.
By default the input path is determined by functionality of the selected
mux mode (regular).
Other bits are used for PAD setting.
Please refer to each fsl,<soc>-pinctrl,txt binding doc for SoC specific part
of bits definitions.
So the reason for the 0x4000 is because SION is set (1<<30). Bits 31 and 30 are used for NO_PAD_CTL and SION respectively, while the other bits are taken directly from the SW_PAD_CTL register that OP was familiar with.