IMX8M-Plus HDMI Spread Spectrum

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IMX8M-Plus HDMI Spread Spectrum

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Vladimir_V
Contributor I

We are trying to enable the spread spectrum on the IMX8M-Plus processor as we have a problem with EMC radiated emissions from the HDMI port (HDMI clock f=148.5MHz) which is a well known and very common HDMI problem.

We searched the forum and checked the details in the IMX8MP manual, but we can't find a solution.

Here is the summary of our research so far:

1. One of the examples for MIPI DSI interface is here on the forum link iMX8M Mini Spread Spectrum, and it says “We verified Spread Spectrum for the MIPI DSI on 8M Plus, it should apply in a similar way to 8MM and 8MN (not 8M). Since BSP 5.10 the clock tree changed and the new DSI-PHY clock source (i.e. OSC_24) doesn't support SS. The Video PLL freq (1.0395GHz) showed some problems, normally the required clock for MIPI DSI-PHY couldn't be achieved due to missing fractional divider. However, SS for DSI can be achieved by enabling spread spectrum of internal PLL of MIPI D-PHY and this is verified on iMX8MP EVK setup. Please try the attached patch to enable SS at MIPI D-PHY"

We looked in the IMX8MP manual, however, unlike the MIPI D-PHY, the HDMI PHY doesn’t support the SS (we can't find any HDMI PHY registers with SSCG_EN bit and PLL description doesn't mention the SS capability).

2. Another forum answer is for the LVDS interface here IMX8MP spread spectrum. It suggests to apply SS on the VIDEO_PLL1 clock that is the clock source for LVDS.

We tried to find the source clock for the HDMI PHY in the manual, but it is not so easy to find this information. In the chapter 13.10.2.1.2 Phase Locked Loop (PLL), there is this: "The nominal reference frequency is 24MHz." but no further information on the source clock.

The Figure 13-81. HDMI BLK_CTRL Clocks shows 2 clocks coming to the HDMI TX PHY, the source clocks are marked as the "bus_blk_clk" and "apb_clk". Which one of these is the source clock and where do they come from (we can't find any reference to the "bus_blk_clk" in the manual)?

3. We also found this manual for SS support on i.MX 8QuadMax and i.MX 8QuadXPlus:

User-Guide-of-Spread-Spectrum-Support-for-i-MX-8QuadMax-and-i-MX 8QuadXPlus Display 

We thought we could use it as an example only, as it does not mention the IMX8M-Plus. However, the suggested SCFW kit doesn't contain any reference or code for SS.

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Vladimir_V
Contributor I

Thanks for clarification. Since SS is not supported, we are looking at the HDMY PHY registers PHY_REG 22-24. Can you please help with this:

1. We need more detailed description of these registers (PHY_REG22, PHY_REG23, PHY_REG24). The reference manual does not give much detail, for example the PHY_REG22 table doesn't explain the meaning of the fields.

2. What are the recommended values for these registers with regards to EMC?

3. Is there an EMC test report (radiated emissions) for the 8MPLUSLPD4-EVK, or at least the Declaration of Conformance?

Thanks.

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Alejandro_Salas
NXP TechSupport
NXP TechSupport

Hello, 

Unfortunately HDMI PHY doesn't support spread spectrum feature. 

The nominal reference frequency of HDMI PHY is 24MHz, which means that the parent clock is XTAL_24M. It cannot support spread spectrum.

 

Alejandro_Salas_0-1718744276271.png

Best regards,

Salas.

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