IMX8 nano (imx8mn) route LPDDR4

[timur_kh]

Hey!

I design a hardware of oneboard PC. I use Imx8 nano and AS4C128M16MD4-062BAN (LPDDR4).

I use the reference document SPF-46441_A1 (have the C1612PC2WDGTKR-U (LPDDR4).

Quastion 1: I don't understand why the names of the nets don't matche with the names of the pins of IC-LPDDR4? Please see attached picture.

Quastion 2: In user guide IMX8MNHDG in table 23 (LPDDR4 delay matching) has 2 kind of delay for the nets (PCB_delay and Pkg_delay_imx8mn?). Where is Pkg_delay_DDR4? Is the delay of IC-LPDDR4 counted?

Quastion 3: How compute the Via delay (ps) in PCB, I know stack up and Dk of PCB.

Thank you!)

[nxf63675 · Accepted solution]

Hi @timur_kh,

1. These because usually for routing the board is easier and cheaper to connect differently DQ nodes, but this must be corrected once you build your board before you boot up your board you will need to build your own image and specify the DDR parameters you use on this one, and one of them maybe is the different DQ lines, refer to the next link for more info:

i.MX 8M Family DDR Tool Release - NXP Community

2. In the Hardware design guide is not counted as this could vary from customer to customer, not all of them will select the same so you will have to look for the specific info on the DDR datasheet.

3. Usually we use the Allegro tool by enabling the Z-Axis Delay in “Setup - Constraints -
Modes”. You can find more relatable info on the next link: DDR design recommendations. 

If there is something more I can help you please let me know.

Regards,

Israel.

[timur_kh]

Hey!
Where can I see the pkg delay for all the pins of imx8mn?

[nxf63675]

Hi @timur_kh,

All the info can be found on the ibis model, you can find it on the next link:

https://www.nxp.com/downloads/en/ibis-model/IMX8MN-14x14.zip

Hope this helps you.

Regards,

Israel.