Hello, I am trying to enable interrupt preemption on the second A7 core of the IMX7D inside a baremetal application. I am performing all of this testing before Linux boots.
Currently I am able to enable interrupts on CPU interface 1 in group 1. To accomplish this I am using the following configuration:
GICC_CTLR = 0x2; //enable group 1 in the CPU interface
GICC_CPMR = 0xFF; // Set the priority filter to the lowest priority
GICD_CTLR = 0x2; //Enable group 1 in the distributor
GICC_ABPR = 0; //Set all groups to have different preemption levels
GICC_BRP =0; //Set all groups to have different preemption levels
For each interrupt (I am testing wtih 2)
GICD_GROUPn = 1 (shifted appropriately);// Have the interrupt signal group 1
GICD_ISENABLERn = 1(shifted appropriately); //enable each interrupts
GPC_IMR1_CORE1_A7 = 0(shifted appropriately);// Unmask interrput for A7_1 core
GICD_PRIORITYRn= 0xC0 for interrupt 1 and 0x10 for interrupt 2
GICD_ITARGETSR= 0x2; //Select the second CPU interface to target
Using this configuration I can see both interrupts firing, however neither will preempt the other, as if they were the same priority. Inside the interrupts I check the current priority GICC_RPR and confirm that the running priority matches the priority that I assigned them (0x10 and 0xC0). I also check the highest priority IR GICC_AHPPIR and it has the interrupt number of the other interrupt.
To check for preemption I am toggling a gpio. While inside the interrupt the GPIO is set high. In this figure you can see the red and yellow pulses. The yellow pulses are a timer interrupt that is higher priority than the other. As you can see, the yellow pulses are never high at the same time as red.
Do you know why preemption does not happen?
