Hello,
yes, the CM7 cache is working.
From the team:
The cache is working in later revisions. Also, there are no CM4 cache specific issues in the errata.
Some issues that are on the community that are related to the CM4 cache:
Unable to use breakpoints on iMX7D when firmware placed in OCRAM... , but this one has a workaround.
Re: i.MX7D: atomic compare and swap instructions don't work with cache , but this issue is not be treated
as a silicon bug and the document https://community.nxp.com/docs/DOC-340245
describes how to work around it.
Have a great day,
Yuri
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