IMX6X and KSZ9031RNX possible or not?

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IMX6X and KSZ9031RNX possible or not?

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vpcb
Contributor I

Hello, I'm working on schematic where trying to connect IMX6SX and KSZ9031RNX with RGMII support.

For reference SABRESDB SX  deisgn is used.

There are some questions that I can't resolve by myself.

1. Loopback clock 125MHz

    In the SABRESD reference design Ethernet RGMII made on two AR8031 IC's with input reference clock 25MHz  from  ENET2_REF_CLK_25M signal (ENET2_RX_CLK (ALT1 option))

   But loopback clock 125MHz made optional and no information about that neither in IMX6SXHDG nor  in IMX6SXRM.

   Questions:  1. Does ENET1_TX_CLK (ENET1_REF_CLK1 (ALT1)) input support 125MHz as reference for RGMII   

                           ENET1 for IMX6SX?

                       2. Has this solution been tested by the  NXP or Freescale staff? I mean RGMII in IMX6SX

                       3. Is it good idea to use KSZ9031RNX with IMX6S? If not what IC's have been tested with IMX6SX as

                         RGMII  PHY?

                       4. Is it possible to use 3.3V as IO voltage on RGMII PHY or it must be 2.5V? I see that almost

                           nobody  except SABRESDB uses 3.3V, they use 2.5V for VDD IO of PHY?

                      5. To use both RGMIIs with IMX6SX I think the next should be done (SABRESDB SX schematic):

                           ENET_BT moved to any GPIO

                           ENET_INT moved to ENET_BT

                          ENET2_TX_CLK pin use as ENET2_REF_CLK2 (ALT1)

                          Is it right?

Thank you. 

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1 Solution
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igorpadykov
NXP Employee
NXP Employee

Hi vpcb

1. yes. Sabre board uses 125M anatop loopback REF_CLK1 for ENET1, clearing gpr1[13], gpr1[17]

please refer to uboot enet settings  setup_fec() in mx6sxsabresd.c

http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/tree/board/freescale/mx6sxsabresd/mx6sxsabre...

2. RGMII is supported on i.MX6SX Sabre SD board using AR8031, please check

its schematic spf-27962 p.15

Schematics (3)

http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/i.mx-applications-process...

3. Seems there are no restrictions using KSZ9031RNX. AR8031 are used as RGMII PHY

on Sabre board.

4. Both 3.3V and 2.5V RGMII are supported according to Table 11. Operating ranges

i.MX6SX Datasheet (rev.1, 9/2015)

http://cache.freescale.com/files/32bit/doc/data_sheet/IMX6SXCEC.pdf

5. yes solution with external clock on ENET2_TX_CLK is also possible.

Best regards

igor

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1 Reply
447 Views
igorpadykov
NXP Employee
NXP Employee

Hi vpcb

1. yes. Sabre board uses 125M anatop loopback REF_CLK1 for ENET1, clearing gpr1[13], gpr1[17]

please refer to uboot enet settings  setup_fec() in mx6sxsabresd.c

http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/tree/board/freescale/mx6sxsabresd/mx6sxsabre...

2. RGMII is supported on i.MX6SX Sabre SD board using AR8031, please check

its schematic spf-27962 p.15

Schematics (3)

http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/i.mx-applications-process...

3. Seems there are no restrictions using KSZ9031RNX. AR8031 are used as RGMII PHY

on Sabre board.

4. Both 3.3V and 2.5V RGMII are supported according to Table 11. Operating ranges

i.MX6SX Datasheet (rev.1, 9/2015)

http://cache.freescale.com/files/32bit/doc/data_sheet/IMX6SXCEC.pdf

5. yes solution with external clock on ENET2_TX_CLK is also possible.

Best regards

igor

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Note: If this post answers your question, please click the Correct Answer button. Thank you!

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