IMX6Q DDR CLK discontinuity

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 

IMX6Q DDR CLK discontinuity

490 次查看
tommyduan
Contributor III

       Before  we use IMX6DL  the DDR CLK is 400MHZ,Clk is continuous.Now we use IMX6Q  the DDR CLK is 528MHZ,My tests found that the clock was off and on,it don't continuous.

      What's the really reason,Is it the problem of software setup?or hardware design bad?DDR_CLK.jpg

0 项奖励
回复
1 回复

376 次查看
Yuri
NXP Employee
NXP Employee

Hello,

 

  The i.MX6 MMDC supports such power saving feature as automatic self-refresh and

power down entry and exit. In automatic self-refresh, the internal operating

clock will be gated for power saving. Please look at section 44.4.6 (Power Saving and

Clock Frequency Change modes) of the i.MX6 D/Q Reference Manual (Rev. 5, 06/2018)

for more details.

 

Have a great day,

Yuri

 

------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer

button. Thank you!

0 项奖励
回复