[IMX6DL/Q] Practical I2c clock frequency not matching theoretical/configured value

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[IMX6DL/Q] Practical I2c clock frequency not matching theoretical/configured value

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shreeharsha_ind
Contributor II

Hi All,

I have configured I2C2 clock frequency to: 400KHz in dts file as follows

&i2c2 {
+ clock-frequency = <400000>;
pinctrl-0 = <&pinctrl_i2c2>;
};

The same is read from sysfs entry as below.

root@toyotacy20-t077:/sys/firmware/devicetree/base/soc/aips-bus@02100000/i2c@021a4000# od -bc clock-frequency

0000000  000 006 032 200

          \0 006 032 200

Theoretically the above value is configured to produce 400KHz.

However when the same clock line is probed we are seeing clock frequency of 337KHz as below

Capture_I2C2_clock.JPG

Is the above behaviour expected? If not kindly let us know how to get the clock value close to 400KHz practically.

 

Regards,
shree

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Yuri
NXP Employee
NXP Employee

@shreeharsha_ind 
Hello,

According to I2C specs, Generation of clock signals on the I2C-bus is always the responsibility
of master devices; each master generates its own clock signals when transferring data on the bus.
Bus clock signals from a master can only be altered when they are stretched by a slow slave device
holding down the clock line or by another master when arbitration occurs.
So, clock stretching feature of the I2C specs does not guarantee exact frequency values, accuracy
here is not specified (and not needed).

Regards,
Yuri.

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