IMX6 At boot time registers not always in default values.

[Kanstantsin1]

Hi there.

I have stumbled to the interesting problem. Custom device is not always booted.

Problem is appeared at power on state and rebooting two. Just set at u-boot param bootcmd as reset.  ~5% starting are broken. Cold reset is used(not warm reset). I have tried to find answer in this way:

https://community.nxp.com/t5/i-MX-Processors/Not-stable-boot-from-emmc-5-1/m-p/1594220

Shortly: looks like device is fall to USB downloader mode after booting data from mmc. Look at the topic above. It has a lot of interesting pictures. ))

Now I tried to read different registers with uuu. And found that some registers has not default values and not at the state I have set at DCD.
For example:
I set at DCD gpio  for SD4 at value  0x0001D020,but in time when the device fall to USB I have 0x000070F0. It is not a default value (0x0001B0B0). 

You can see diff of two registers (bmode usb VS freeze

And it is not only with iomuxc problem.  Some times I see problems even with mmdc initialization. For example:

Above you can see registers after two different freezes. At right side mmdc registers even not set (I haven't compared with default).At right side another freeze but mmdc registers.
And for example register 0x021b08b8 must be 0x00000800. But here none of them contain this value.

OSC looks  stable.
Powers - also stable. I reproduce the freezes even in cycle reset. 
Just set at u-boot param bootcmd as reset

[Kanstantsin1]

Hi, Dhruvit .

I'm glad to hear from you.

1. Important moment: the problems appears from time to time on the same device without reprogramming.

2. It seems to me the problem is from quartz stability. I try to push my hw department to test external stable clock source.But now they decided it is not the most important problem.  So I wait and remind them from time to time.

[Dhruvit]

Hi @Kanstantsin1,

I hope you are doing well

For debugging the issue of falling the board in serial download mode one can check the BOOT_MODE[1:0] value from SRC_SBMR2 register on the board mentioned in Table 8-1. Boot MODE pin settings from IMX6SXRM.

For further debugging the issue, Kindly refer to section 8.2 Boot modes and 8.12.1 Using manufacture mode / serial download mode with eMMC from the IMX6SXRM. 

One can try to boot from the fuses also. For that kindly refer to section 8.2.3 Boot From Fuses mode from the IMX6SXRM. 

Thanks & Regards,

Dhruvit Vasavada

[Dhruvit]

Hi @Kanstantsin1,

I hope you are doing well

Shortly: looks like the device falls to USB downloader mode after booting data from mmc

=> The possible reason can be if an error occurs during the internal boot, the boot code jumps to the Serial Downloader. 

In your case does your board boot?

For query related to registers, Kindly mentions how and from where you are reading the register value.

Thanks & Regards,
Dhruvit Vasavada

[Kanstantsin1]

Hi Dhruvit.

Yes. It falls to USB downloader. 

At this mode I've read the register. I am used uuu to read the registers.

About "In your case does your board boot?"

Most of the power-ons it boots the board, but sometimes it doesn't boot and falls to USB downloader at these cases I am reading the registers. And see the strange picture. Sometimes all of them are in right value (like are set at DCD) and sometimes only part of them in right value (it crashes my mind).

In cases when the device boots it works really stable- no one test sees the problem.

BTW using secondary bootloader (with 0x00112233) pointed to the sector of the first bootloader reduces count of the falls to usb-downloader, but not fix the problem.

[Dhruvit]

Hi @Kanstantsin1,

I hope you are doing well.

I really apologize for the delay in my response.

For debugging the issue of falling the board into the serial download mode, kindly try to read the SRC_SBMRx register to check the boot mode.

One of the reasons could be an improper image in mmc or the mmc is not detected by the ROM code.

Kindly try the demo images from the below document.

Embedded Linux for i.MX Applications Processors

Thanks & Regards,
Dhruvit Vasavada