IMX53 internal pull resistor question

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IMX53 internal pull resistor question

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sherry_zahid
Contributor III

Hi,

I am reading table 112 on the IMX53 data sheet, page 153. I am interested in the "Out of reset conditions" specifically the direction and the config. For example it states for the pin "DISP0_DAT20" that direction will be input and config will be 100 KΩ PU. Does this mean that on reset the IMX53 device will initialize this pin as an input and there will be a 100 KΩ internal pull up enabled? Thanks in advance

Sherry

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igorpadykov
NXP Employee
NXP Employee

Hi Sherry

yes, on reset the IMX53 device will initialize this pin as an input and

there will be a 100 KΩ internal pull up enabled, for "DISP0_DAT20"

one can look at sect.43.3.248 IOMUXC_SW_PAD_CTL_PAD_DISP0_DAT20

(IOMUXC_SW_PAD_CTL_PAD_DISP0_DAT20)  i.MX53 RM.

Best regards

igor

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448件の閲覧回数
igorpadykov
NXP Employee
NXP Employee

Hi Sherry

yes, on reset the IMX53 device will initialize this pin as an input and

there will be a 100 KΩ internal pull up enabled, for "DISP0_DAT20"

one can look at sect.43.3.248 IOMUXC_SW_PAD_CTL_PAD_DISP0_DAT20

(IOMUXC_SW_PAD_CTL_PAD_DISP0_DAT20)  i.MX53 RM.

Best regards

igor

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

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sherry_zahid
Contributor III

Thanks Igor! All your support is much appreciated.

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