I.MX253 using PKE of IOMUXC_SW_PAD_CTL_PAD_A20

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I.MX253 using PKE of IOMUXC_SW_PAD_CTL_PAD_A20

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rohith1z
Contributor III

Hello,

My problem is that I would like be able to deterministically control the initial value of A20 after I configure the pin. At the moment I'm trying to use the pin's pull up to do this, but I don't think it is working. To help me solve this problem, would you please explain how to use the pull / keeper feature of A20.

If I look at the register IOMUXC_SW_PAD_CTL_PAD_A20 there is a PKE bit.

If I set bit 7 high should a pull up/down or a keeper be enabled?

By the ways is this port a pull up or pull down or keeper only?

I'm confused because some of the other GPIO ports also have a PUE bit (usually bit 6) which controls whether a pull up/down or keeper is selected. This port doesn't include this bit in the description.   

I'm looking at page 2281 of the reference manual (IMX25RM, Rev. 2, 01/2011)

If I set bit 7 of the IOMUXC_SW_PAD_CTL_PAD_A20, then I can demonstrate the keeper funcunality (e.g. if I overdrive the pin then the new state holds), but during power up the pin sporadically starts as high or low -- to me this implies that there is no pull up.

Thanks

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Yuri
NXP Employee
NXP Employee

Hello,

  Bit PUE (Pull / Keep Select Field, 6-th bit) of IOMUXC_SW_PAD_CTL_PAD_A20 is
always zero, that is - keeper option is selected. And the keeper may be enabled or disabled.
No pulling resistors. Note, A20 is output signal.

Have a great day,
Yuri

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