The most easy and commonly used way to connect FPGA to the processor is implementing in your FPGA a kind of common SRAM-type interface and than connect it as common SRAM memory.
For i.MX6 case "External Interface Module" (EIM) interface should be used to connect this FPGA in SRAM-type interface mode. I see EIM supports 32-bit wide data bus and burst accesses, where it can read/write one 32-bit data beat per one clock. Assuming, for example, 100 Mhz bus clock, this leads to 32*100 = 3,2 gigabits or 400 megabytes per second. This is peak throughput, actual value will be approx 2/3 less due to bus overhead. So, the expected sustained value is approx 266 megabytes per second.
Also, from from the Artix description, I see this FPGA supports PCI-Express interface. So, PCI-Express could be also used. However. for i.MX6 device, this device has only one Gen 2.0 x1 lane which is typically used for other connections, for example for WiFi module connection. For this interface the throughput is 5 Gbps in Gen 2.0 mode or 2.5 Gbps in Gen 1.1
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------
