Hello,
How can I determine the reset reason of an i.mx6 dual processor using a custom hardware?
I found the following code in uboot:
static char *get_reset_cause(void)
{
u32 cause;
struct src *src_regs = (struct src *)SRC_BASE_ADDR;
cause = readl(&src_regs->srsr);
reset_cause = cause;
switch (cause) {
case 0x00001:
case 0x00011:
return "POR";
case 0x00004:
return "CSU";
case 0x00008:
return "IPP USER";
case 0x00010:
return "WDOG";
case 0x00020:
return "JTAG HIGH-Z";
case 0x00040:
return "JTAG SW";
case 0x00080:
return "WDOG3";
case 0x00100:
return "TEMPSENSE";
case 0x10000:
return "WARM BOOT";
default:
return "unknown reset";
}
}
But which register is accessed? Is this register documented in any data sheet? Is it accessible also from Linux? What is the meaning of "CSU", "IPP_USER", "JTAG HIGH-Z", "JTAG SW" and "WDOG3"?
