I would like to confirm if the IMX has the same functionality as the Raspberry Pi.
https://iosoft.blog/2020/07/16/raspberry-pi-smi/
Solved! Go to Solution.
Hello @HankChang989 ,
I hope you are doing well.
->There is no support imx8mplus gives for a secondary memory interface as Raspberry has.
->SMI offers a very fast parallel interface - over 80 megabytes per second on a ZeroW.
->The external memory interface on the i.MX precisely seems the Raspberry Pi's "Secondary Memory Interface". So it's good to use it there is equivalent functionality.
->Using the external memory interface gives better performance and more flexibility about the timings.
->Imx8m plus gives LPDDR4, DDR4 (32-bit up to 4.0GT/s)external memory interface support.
->One can find more features about imx8mp in the below-given link.
https://www.nxp.com/products/
I hope this information helps you!
Thanks & Regards,
Hello @HankChang989 ,
I hope you are doing well.
->There is no support imx8mplus gives for a secondary memory interface as Raspberry has.
->SMI offers a very fast parallel interface - over 80 megabytes per second on a ZeroW.
->The external memory interface on the i.MX precisely seems the Raspberry Pi's "Secondary Memory Interface". So it's good to use it there is equivalent functionality.
->Using the external memory interface gives better performance and more flexibility about the timings.
->Imx8m plus gives LPDDR4, DDR4 (32-bit up to 4.0GT/s)external memory interface support.
->One can find more features about imx8mp in the below-given link.
https://www.nxp.com/products/
I hope this information helps you!
Thanks & Regards,
Thank you Snaket Parekh for the prompt response.
1.What is the bit width of the Parallel bus address and data? (Are both the address and data 32-bit?)
2.Is there any sample code available for reference?
3.I want to control the timing of 0 and 1 for data bit, is it possible?
Hello @HankChang989 ,
I hope you are doing well.
1. What is the bit width of the Parallel bus address and data? (Are both the address and data 32-bit?)
->It is not fixed because the programmable Data port sizes for each Chip Select are x8, x16, and x32.
->There is Independent synchronous Memory Burst Read Mode support for NOR-Flash and PSRAM memories like x16 and x32 port size.
Hello @HankChang989
I hope you are doing well.
Any Updates from your side?
Thanks & Regards,
Sanket Parekh
Thank you for your quick response and following up on the issue.
The issue has been resolved. Thank you for your assistance.
Have a great day!
Hello @HankChang989 ,
I hope you are doing well.
I'm glad that the issue is resolved.
Hence closing this case.
Have a great day!
Thanks & Regards,
Sanket Parekh