DQ mapping issue

[simonng]

Hi NXP Team,

We are using i.MX8MQ processor with scrambled channel and data mapping to the LPDDR4 memory on our board. We are writing some test programs on the uboot to test the LPDDR4 memory. When I define a data and write it to the memory, what is the final data write to the DRAM?

For example, 

unsigned long testdata = 0xFEDCBA9876543210;

with the above channel and data configuration, what data will be written to the DRAM?

Thanks.

[Yuri · Accepted solution]

@simonng 
Hello,

   Low byte 0x10 will be mapped to memory chan B 0x04: 4-th bit of i.MX8 to 2 bit of the memory
.... and so on.

Regards,
Yuri.

[simonng]

Hi Yuri,

Thanks for your reply.

Regards,

Simon