About  i.MX6 ULL DDR3.

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About  i.MX6 ULL DDR3.

659件の閲覧回数
ryoichiyokota
Contributor I

I want to know DDR3 max density.

Please teach me.

Best regards.

ラベル(1)
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490件の閲覧回数
igorpadykov
NXP Employee
NXP Employee

Hi ryoichi

max. density is defined by max. row=16, col=12 settings in MDCTL register

described in sect.36.12.1 MMDC Core Control Register (MMDC_MDCTL) i.MX6ULL RM

http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6ULLRM.pdf 

Best regards
igor
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