About a list of function pins of the i.MX6UL series

[yuuki]

Dear all,

We check pin information for each Part Number of i.MX6UL.

　 Part Number: G0/G1/G2/G3

However, we cannot find the list which explained a pin for each Part Number individually.

Is there the pin mux information for each Part Number?

Peripheral information of each Part Number is listed in Table2 of the data sheet.

http://cache.nxp.com/files/32bit/doc/data_sheet/IMX6ULCEC.pdf

- Table 2. Detailed Peripherals Information

And, we refer to Chapter4 of Reference Manual for pin mux information.

http://cache.nxp.com/files/32bit/doc/ref_manual/IMX6ULRM.pdf

- Chapter 4 External Signals and Pin Multiplexing

All pins for G2 and G3 are listed in pin mux information of Reference Manual.

However, We can not find the pin mux information for G0 and G1.

For example, G0 and G1 don't have Ether2 function.

However, in Chapter4 of Reference Manual, this information is not explained.

Best Regards,

Yuuki

[Yuri · Accepted solution]

Hello,

  The i.MX6 UL Reference Manual (RM) is  common for all i.MX6 UL releases.

It provides general descriptions of i.MX6UL modules. The i.MX6UL Datasheet(s)

provide hardware specs of modules. Please use the FactSheet below for more
details about differences between i.MX6UL releases (“i.MX 6UltraLite Device Options”). 

http://cache.freescale.com/files/32bit/doc/fact_sheet/IMX6ULTRALITEFS.pdf

  Also, You may use the Table 2-1 (System memory map), Table 2-2 (AIPS-1 memory

map) and  Table 2-3 (AIPS-2 memory map) of the RM to define base addresses

of module instances.

http://cache.nxp.com/files/32bit/doc/ref_manual/IMX6ULRM.pdf

  It may be recommended to use the  Processor Expert for i.MX.

Processor Expert for i.MX|NXP

http://cache.nxp.com/lgfiles/devsuites/PEx/i.MX_6_UL_Service_Pack-unzip_me.zip?fpsp=1&WT_TYPE=Update...

Have a great day,
Yuri

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