About Dumb PMIC mode and Smart PMIC mode

[goto11]

Hello,Community

In Dumb PMIC mode, ON and OFF states are issued by issuing PMIC_ON_REQ with a level signal.
(Reference i.MX 7 Dual Applications Processor Reference Manual)

In Smart PMIC mode, it is stated that PMIC_ON_REQ is issued as a pulse signal for the ON state.
Please tell me about power off.
Register name and field name to set power off interrupt.
Behavior of PMIC_ON_REQ when power is off.

Quote
The only configuration option available for this mode is the Debounce configuration that is used for the "Power Off" interrupt.

Best Reguards,

Goto

[igorpadykov]

Hi Goto

>Behavior of PMIC_ON_REQ when power is off

it is "0", as described in Figure 6-4. Chip reset scheme under PMU control

i.MX7D Reference Manual.

>Register name and field name to set power off interrupt.

could you clarify what do you mean by " power off interrupt" ?

Power off example with PMIC_ON_REQ can be found on link

https://community.nxp.com/docs/DOC-339779 

Best regards
igor
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[goto11]

Hello,

In Smart PMIC mode, it is stated that PMIC_ON_REQ is issued as a pulse signal for the ON state.
Please tell me about power off.
Register name and field name to set power off interrupt.

>Register name and field name to set power off interrupt.

could you clarify what do you mean by " power off interrupt" ?

<-

The following is described in 6.1.4.1 PMIC interface Smart PMIC mode of i.MX 7Dual Applications Processor Reference Manual.

The state immediately after RESET and before ROM firmware or software has executed.

Best regards

Goto

[igorpadykov]

Hi Goto

" power off interrupt" is used in Smart PMIC mode, as

stated in sect.6.1.4.1. i.MX7D supports only Dumb PMIC mode.

Best regards
igor