Debug steps for customer MIPI sensor.docx

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Debug steps for customer MIPI sensor.docx

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Debug steps for customer MIPI sensor.docx

I've been asked to help to upload the doc in MPU support space. The doc describes some ideas about how to support a customer to enable a mipi-csi2 sensor connected with i.MX6DQ/6DL. Hope this may be helpful.

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Hello Ying,

Thank you very much for a very helpful document! For item C.2, MIPI DPHY clock should match the camera sensor clock, I don't know which camera output clock mentioned here, mipi_clk, SCLK or something else.

mipi_csi2_write(info, 0x00000014, CSI2_PHY_TST_CTRL1);//ov5640 output clk

The attached diagram is for camera output clocks of OV5640. Could you suggest me which type of clock is chosen for corresponding MIPI DPHY clock

Best regards,

An.

ov5640_diagram.jpg

MIPI DPHY clock should match the camera sensor clock, as the  sensor  output Differential clock range is from 80Mhz to 1000Mhz

If I understand that document correct you will need to use the MIPI_CLK as mipi clock, and then use the double of that (since it's DDR) as bitrate for looking up the value you need to set in CSI2_PHY_TST_CTRL1 (using the list in the document).

You will also need to set the MIPI Global timing register on the ov564x to match the PCLK.

Also, I've found that the clock from sensor must not be running when CSI2 is configured.

I've done this for OV5645 sensor (based on the Freescale OV5640 driver), I could share the code if you're interested. They should be very similar.

Hi Emil,

Thank you very much for very useful information!

Since I modified OV5640 driver for  another camera sensor which supports only 8 bit raw output format, MIPI_DT_RAW8 is used for mipi_csi2_set_datatype, and IPU_PIX_FMT_GENERIC for IPU  setting.

However, I am not clear how this output format may affect IPU and CSI2 setting or another part. Could you advice me more?

Best regards,

An.

From my limited knowledge I don't see any problems with using that, assuming that sensor is setup to use that format, mipi_csi2 and IPU (might need to add it to csi_enc_setup?).

From my experience, checking the CSI2 ERR1, ERR2 and PHY_STATE registers could provide some hints on where things go wrong.

Regards,

Emil

m_c

May we know how to calculate register value of MIPI_CSI_PHY_TST_CTRL1? We can't find formula at Freescale i.MX6 reference manual 40.6.14 D-PHY Test interface control 1. <http://www.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf >

Hello,

I face tough problems with MIPI sensor on Freescale board, MCIMX6Q_SDB (http://www.nxp.com/files/32bit/doc/fact_sheet/RDIMX6SABREBRDFS.pdf ). 4 data lanes was set by mipi_csi2_set_lanes().

However,

- mipi_csi2_dphy_status() returns 0x630

This should be 0x3f0 according to "Debug steps for customer MIPI sensor.docx"

- mipi_csi2_get_error1() returns 0x10000010 which means "Error matching Frame Start with Frame End for Virtual Channel 0"

Can you explain me about the wrong with dphy_status and mipi_csi_err1? Or share your experience when dealing with such kinds of issues?

Thank you!

Hello nguyen,

I am also facing same issue. But mipi_csi2_dphy_status() returns 0x300 and mipi_csi2_get_error() returns 0x10000010. can you help me to

resolve this error.

Regards,

Anil

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‎03-19-2013 01:05 AM
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